PicoBlaze 8-bit Microcontroller
PicoBlaze™ is a fully embedded 8-bit RISC microcontroller core optimized for 7-series and older Xilinx FPGA architectures.
- MCU
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
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Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
PicoBlaze 8-bit Microcontroller
PicoBlaze™ is a fully embedded 8-bit RISC microcontroller core optimized for 7-series and older Xilinx FPGA architectures.
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The LogiCORE™ IP AXI Universal Asynchronous Receiver Transmitter (UART) Lite interface connects to the Microcontroller Bus Archit…
The AXI Universal Asynchronous Receiver Transmitter (UART) 16550 connects to the AMBA® (Advance Microcontroller Bus Architecture)…
This document describes the specifications for a Microcontroller Bus Architecture (AMBA®) specification’s eXtensible Interface (A…
The eXtensible Lite (AXI) Timebase Watchdog Timer is a 32-bit peripheral that provides a 32-bit free-running timebase and watchdo…
AXI System Monitor Analog/Digital Converter
The AXI Sysmon ADC IP Core is a 32-bit slave peripheral that connects to the AXI4 ( eXtensible Interface) and provides the trolle…
AXI SystemACE Interface Controller
The AXI System ACE™ Interface Controller (AXI SYSACE) is the interface between the AMBA® AXI4 Lite and the Microprocessor Unit (M…
The LogiCORE® IP AXI Slave Burst is an interface between the AXI4 memory-mapped interface to the IPIC (IP Inter Connect).
The Microcontroller Bus Architecture (AMBA®) eXtensible Interface (AXI4) to Processor Local Bus (PLB v4.6) Bridge translates AXI …
The LogiCORE™ IP AXI Interrupt Controller (AXI INTC) core concentrates multiple interrupt inputs from peripheral devices to a sin…
This product specification defines the architecture, hardware (signal) interface, software (register) interface and parameterizat…
The AXI Hardware ICAP enables an embedded microprocessor, such as MicroBlaze, to read and write the FPGA configuration memory thr…
The AXI GPIO provides a general purpose input/output interface to the AXI ( eXtensible Interface) interface.
The AXI Streaming FIFO allows memory mapped access to a AXI Streaming interface.
The AXI Ethernet Lite MAC supports the IEEE Std.
AXI External Peripheral Controller
The AXI External Peripheral Controller (AXI EPC IP Core) supports data transfers between the AXI4 Interface and external synchron…