32-bit/33MHz Multi-Function PCI Master/Target

The PCI-M32MF implements a master/target PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up to 33 MHz PCI clock.

The core offers one to eight independent PCI functions in a single chip, each implementing 64 to 256 bytes of PCI Configuration Space registers as required. Each function supports up to six Base Address Registers, with both I/O and Memory space decoding from 16 bytes up to 4GB.

The PCI-M32MF builds on more than 15 years of CAST PCI IP expertise and has been designed for straightforward reuse, with proven design practices that ensure easy integration and smooth technology mapping. The core is available in synthesizable RTL or as a targeted FPGA netlist, and is delivered with everything required for rapid and successful integration and implementation.

• Fully compliant with the PCI Local Bus Specification, Revision 2.3.
• 33 MHz performance
• 32-bit datapath
• Full Master/Target functionality, with support for these commands:
  • Configuration Read, Configuration Write
    Memory Read, Memory Write, Memory Read Multiple (MRM), Memory Read Line (MRL), Memory Write and Invalidate (MWI)
  • I/O Read, I/O Write
• Zero wait states burst mode
• Support all interrupt pins (INTA#, INTB#, INTC#, INTD#)
• Type 0 Configuration space
• Support of all Base Address Registers
• Support of backend initiated target retry, disconnect and abort
• Parity generation and parity error detection
• Silicon-proven