Tutorial: Floating-point arithmetic on FPGAs
This article explains the basics of floating-point arithmetic, how floating-point units (FPUs) work, and how to use FPGAs for easy, low-cost floating-point processing.
Vendor:
Xilinx, Inc.
Category:
Arithmetic Units
Multiply Accumulator
The Multiply Accumulator IP accepts two operands, a multiplier and a multiplicand, and produces a product (A*B=Prod) that is adde…
Overview
The Multiply Accumulator IP accepts two operands, a multiplier and a multiplicand, and produces a product (A*B=Prod) that is added/subtracted to the previous adder/subtracter result (S=S+/-Prod). This product value can be loaded with assertion of Bypass (S=Prod). The Multiply Adder IP is implemented using Xtreme DSP™ slices and operates on signed or unsigned data.
Key features
- Supports multiplier inputs ranging from 1 to 31 bits unsigned or 2 to 32 bits signed and an output width ranging from 1 to 79 bits unsigned or 2 to 80 bits signed
- Latency can be set for optimal speed or the minimal amount of pipelining allowed "Latency = 1" (accumulation register required)
- Instantaneous Resource Estimation
- For use with Xilinx CORE Generator™
Specifications
Identity
Part Number
Multiply Accumulator
Vendor
Xilinx, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
Learn more about Arithmetic Units IP core
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Frequently asked questions about Arithmetic Unit IP cores
What is Multiply Accumulator?
Multiply Accumulator is a Arithmetic Units IP core from Xilinx, Inc. listed on Semi IP Hub.
How should engineers evaluate this Arithmetic Units?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Arithmetic Units IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.