SerDes IP Listing

The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth…

• TSMC
• 3nm
• N3A

The 224G Ethernet PHY IP, an integral part of the high-speed SerDes IP portfolio, meets the growing high bandwidth and low latenc…

• TSMC
• 3nm
• N3E

32G NRZ Multi-Protocol PHY

• TSMC
• 5nm
• N5
• Silicon Proven

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• GlobalFoundries
• 12nm
• LP

Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for d…

• GlobalFoundries
• 12nm
• LP
• Available on request

Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for d…

• GlobalFoundries
• 12nm
• LP
• Available on request

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• GlobalFoundries
• 22nm
• FDX

Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for d…

• GlobalFoundries
• 22nm
• FDX
• Available on request

Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for d…

• TSMC
• 7nm
• N7FF
• Available on request

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• TSMC
• 3nm
• N3E

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• TSMC
• 3nm
• N3E

The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specific…

• MIPI M-PHY
• TSMC
• 55nm
• ULP
• In Production

The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-…

• MIPI M-PHY
• TSMC
• 40nm
• LP
• In Production

Designed for multi-protocols running on single PHY macro and is compliant with USB 3.1, PCI Express (PCIe) 3.1, DisplayPort TX v1.4, Embedded DisplayPort TX v1.4b, SATA 3, QSGMII

• PHY
• TSMC
• 5nm +3
• FFC +2
• Available on request

The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwid…

• USB 3.1
• SMIC
• 55nm
• LL
• In Production

The Camera Link® IP Core is a high-speed LVDS transmitter / receiver pair that conforms to the standard Camera Link protocol orig…

• Video Transport

Silicon Creations’ broad portfolio of general-purpose and optimized ring-based PLLs offer a wide range of clocking solutions.

• PLL
• Proven
• Available Now

The DeepSub™ pPLL08F is an all digital RF frequency synthesizer PLL featuring industry jitter (sub 300fs), phase noise and compac…

• TSMC
• 6nm
• N6

USB3.1Type-C PHY IP is a high performance high speed SERDES IP designed for chips that perform high bandwidth data communication …

• USB 3.1
• TSMC
• 55nm
• ULP
• In Production

A high performance, high-speed SERDES IP known as USB3.1Type-C PHY was created for semiconductors that allow high bandwidth data …

• USB 3.1