The UALink Controller delivers ultra-low latency and high-bandwidth interconnects that enable seamless scale-up connectivity between AI accelerators
- UALink
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The UALink Controller delivers ultra-low latency and high-bandwidth interconnects that enable seamless scale-up connectivity between AI accelerators
The I/O Physical Memory Protection (IOPMP) unit is a hardware-based access control mechanism designed to safeguard memory regions…
10xEngineers Debug & N-Trace IP delivers a unified Debug + Trace solution that provides full-system visibility with low overhead …
PUF-based Post-Quantum Cryptography (PQC) Solution
As quantum computing advances at an unprecedented pace, traditional cryptographic systems are encountering new challenges.
Secure Storage Solution for OTP IP
The Synopsys Secure Storage Solution for OTP is an add-on to Synopsys One-Time Programmable (OTP) Non-Volatile Memory (NVM) IP.
Verification IP for AMBA AXI4-Stream
Synopsys Verification IP (VIP) for Arm® AMBA® AXI4-Stream™ provides a comprehensive set of protocol, methodology, verification, a…
Synopsys Verification IP (VIP) for Arm® AMBA® ATB™ provides a comprehensive set of protocol, methodology, verification, and produ…
Synopsys Verification IP (VIP) for Arm® AMBA® APB™ provides a comprehensive set of protocol, methodology, verification, and produ…
Synopsys Verification IP (VIP) for Arm® AMBA® AHB™ provides a comprehensive set of protocol, methodology, verification, and produ…
VIP for Compute Express Link (CXL)
Synopsys Verification IP (VIP) for CXL provides verification of design implementations based on CXL specifications which can be u…
MIPI D-PHY and FPD-Link(LVDS) Combinational Transmitter for TSMC 22nm ULP
The MIPI D-PHY and FPD-Link (LVDS) combinational Transmitter is useful 4 Data Channel driverhard macro for DSI® of TSMC 22nm ULP process.
Line-Rate UDP/IPv6 Offload for Modern FPGA Designs UOE6 is Atomic Rules’ next-generation UDP Offload Engine, purpose-built for IP…
Dual Port Register File Compiler (1 Read-only port, 1 Write-only port) - GF 22FDX+
2 Port Register File Bit Cell Power Supply (V) TP185SL 0.8
Single Port High-Speed Multi Bank SRAM Memory Compiler on GF 22FDX+
High Speed Multi Bank 32KWords Deep.
Single Port Low Leakage Register File Compiler - GF 22FDX+
SP Ultra Low Leakage Reg File.
Single Port Low Leakage SRAM Memory Compiler on GF 22FDX+
SP Ultra Low Leakage SRAM.
Single Port Low Leakage Register File Compiler - GF 22FDX+
Single port register file compiler with low power retention mode and three speed options Bit Cell Power Supply (V) P110UL 0.8
Single Port Low Leakage SRAM Memory Compiler on GF 22FDX+
Single port SRAM compiler with optional redundancy, low power retention mode, and three speed options Bit Cell: P110UL Power Supp…
5G LDPC Decoder
5G Polar Decoder