Vendor: Synopsys, Inc. Category: Bus Fabric

Verification IP for AMBA APB

Synopsys Verification IP (VIP) for Arm® AMBA® APB™ provides a comprehensive set of protocol, methodology, verification, and produ…

Verification IP View all specifications

Overview

Synopsys Verification IP (VIP) for Arm® AMBA® APB™ provides a comprehensive set of protocol, methodology, verification, and productivity features, enabling users to achieve accelerated verification closure of Arm AMBA based designs supporting APB D and E/APB4/APB3/APB2.

Key features

  • Support for APB D and E/APB4/APB3/APB2
  • APB2 features:
    • Primary initiates transfers on the Peripheral Bus
    • Primary supports Write, Read, and Idle transactions
    • Primaryr supports maximum of 16 slave devices
    • Socondary memory response modeled by sequences
  • APB3 features:
    • Secondary supports wait states using PREADY signal
    • Secondary supports error response using PSLVERR signal
  • APB4 features:
    • Primary supports write strobe using PSTRB signal
    • Trace Data Transfer (Valid, ready signaling)

Block Diagram

Benefits

  • Native SystemVerilog/Verilog with UVM
  • Includes primary, secondary, monitor
  • Runs natively on all major simulators
  • Built-in UVM sequence library
  • Verdi protocol aware debug

Specifications

Identity

Part Number
Verification IP for AMBA APB
Vendor
Synopsys, Inc.
Type
Verification IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

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Frequently asked questions about On-Chip Bus IP cores

What is Verification IP for AMBA APB?

Verification IP for AMBA APB is a Bus Fabric IP core from Synopsys, Inc. listed on Semi IP Hub.

How should engineers evaluate this Bus Fabric?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Bus Fabric IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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