Vendor: Synopsys, Inc. Category: Bus Fabric

Verification IP for AMBA AHB

Synopsys Verification IP (VIP) for Arm® AMBA® AHB™ provides a comprehensive set of protocol, methodology, verification, and produ…

Verification IP View all specifications

Overview

Synopsys Verification IP (VIP) for Arm® AMBA® AHB™ provides a comprehensive set of protocol, methodology, verification, and productivity features, enabling users to achieve accelerated verification closure of Arm AMBA based designs supporting AHB5, AHB3, AHB2, AHB-Lite, and AHB Multi Layer.

Key features

  • Complete protocol support for AHB5, AHB3, AHB2, AHB-Lite, and AHB Multi Layer
  • Includes primary, secondary, monitor
  • Configurable bus model
  • Backdoor access to AHB secondary memory
  • Ability to control wait states and secondary response types
  • Ability to control signal values during idle periods

Block Diagram

Benefits

  • Native SystemVerilog/Verilog with UVM
  • Optional source code Test suite (EA)
  • Runs on all major simulators
  • Performance metrics for latency and throughput
  • Reference Verification Platform
  • Built-in port and system level checks for protocol, data integrity
  • Built-in verification plan and coverage
  • Verdi® protocol aware debug
  • Debug port for transaction tracking on waveforms

Specifications

Identity

Part Number
Verification IP for AMBA AHB
Vendor
Synopsys, Inc.
Type
Verification IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Bus Fabric IP core

Achieving Low power with Active Clock Gating for IoT in IPs

With the evolution of Internet of Things, the requirement for ultra-low power systems have increased. To design a low power system, we must apply all the possible low power methods at each level of the system implementation. Currently, most of the systems are designed by integrating off-the-shelf Digital and Analog Intellectual Property (IP) blocks. In this paper, we focus on achieving lower power for existing IPs and the importance of architecture level clock gating and EDA Tool inserted clock gating.

Context Based Clock Gating Technique For Low Power Designs of IoT Applications - A DesignWare IP Case Study

This paper discusses about the intelligent low power techniques such as context based clock gating and how they are useful for IoT applications. It also describes how it improves the overall power efficiency of the system. The power statistics shared shows how the overall idle power and functional power consumption is significantly reduced. Further we discuss about how it can be combined with few other low power techniques to reduce the overall power

Software Driven Verification

This paper will discuss the changing landscape of verification caused by the increased importance of software for the success of chip design projects. With software determining an increasing amount of functionality, design teams are adopting virtual prototypes for early software development. Another use case for virtual prototypes is software driven verification, in which testbenches for verification of the hardware are executed in software running on transaction-level models of processors as part of virtual prototypes

The good? The bad? The ugly? IP Perspectives from Vendor to SOC Designer

While the IP landscape will always look different when seen through the eyes of SOC designers, integrators and IP vendors, these players gain a significant advantage if they see each others’ roles more clearly. This article explores the perspectives of three such players and their different ways of working with IP with an eye to making life with IP easier for everyone.

Frequently asked questions about On-Chip Bus IP cores

What is Verification IP for AMBA AHB?

Verification IP for AMBA AHB is a Bus Fabric IP core from Synopsys, Inc. listed on Semi IP Hub.

How should engineers evaluate this Bus Fabric?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Bus Fabric IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP