Fractional-N Frequency Synthesizer (40nm - 110nm)
The Fractional-N Frequency Synthesizers generate a stable clock from low frequency reference clock.
- TSMC
- 40nm
- ULP
- In Production
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Fractional-N Frequency Synthesizer (40nm - 110nm)
The Fractional-N Frequency Synthesizers generate a stable clock from low frequency reference clock.
High-Stable Oscillator - TSMC 40nm(CLN40ULP) / UMC 55nm(LP)
The High Stability Oscillators generate 150MHz - 160MHz output frequency with an accuracy of +/-2% or +/-3% or +/-5%.
DDR5/DDR4/LPDDR5 Combo PHY IP - 4800Mbps (Silicon Proven in TSMC 12FFC)
The DDR PHY IP supports DDR5/ DDR4/ LPDDR5, provides low latency, and enables up to 5400MT/s throughput.
NB-IoT Based Cellular IoT Platform with GNSS support
The Ceva-Waves Dragonfly platform is a turnkey platform with optimized, low-power hardware IP and protocol software for implement…
The Integer PLLs generate a stable clock from low frequency reference clock.
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP
The unified PHY complies with the USB, USB 3.0, Serial ATA, Peripheral Component Interconnect Express (PCIe), and USB 2.0 interfa…
PPA optimized for short reach connectivity
1.8GHz SSCG PLL on TSMC 28nm HPC+
Analog-PLL For Spread Spectrum Clock on TSMC 28nm HPC+
Root of Trust - Foundational security for SoCs, secure MCU devices and sensors
Designed to be integrated in secure MCUs (microcontrollers), the RT-260 Root of Trust (formerly VaultIP) is a FIPS 140-3 CMVP com…
Designed to be integrated in power and space-constrained SoCs or FPGAs, the RT-131 Root of Trust (formerly VaultIP) is a FIPS 140…
Designed to be integrated in power and space-constrained SoCs or FPGAs, the RT-130 Root of Trust (formerly VaultIP) is a SESIP, P…
Root of Trust - Foundational security in SoCs and FPGAs for Chinese IoT clients and sensors
Designed to be integrated in power and space-constrained SoCs or FPGAs, the RT-121 Root of Trust (formerly VaultIP) is a FIPS 140…
Root of Trust - Foundational security in SoCs and FPGAs for IoT clients and sensors
Designed to be integrated in power and space-constrained SoCs or FPGAs, the RT-120 Root of Trust (formerly VaultIP) is a FIPS 140…
NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master …
ultra Low power Bluetooth v5.3 Dual-Mode RF IP in TSMC40nm
Ultra-Low-Power Bluetooth Dual-Mode RF Transceiver IP in TSMC 40nm Logic LP processes node, The Radio Support standards like Blue…
Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
KJN-S1 is able to get Higher performance lossless Compression by original algorithm.
H.264/AVC 4K 60p High Profile Decoder
Supports up to 4K 60fps processing.
H.264/AVC 4K 60p High Profile Encoder
Supports up to 4K 60fps processing.
Baseline JPEG hardware IP compliant to the ISO/IEC 10918-1 standard as a very compact and high-speed compression IP.
Baseline JPEG hardware IP compliant to the ISO/IEC 10918-1 standard as a very compact and high-speed compression IP.