4Kx8 Bits OTP (One-Time Programmable) IP, VIS 0.15µm 1.8V/5V BCD GIII Process
The ATO0004KX8VI150BG33NA is organized as a 4K-bits by 8 one-time programmable.
- VIS
- 150nm
- Silicon Proven
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
4Kx8 Bits OTP (One-Time Programmable) IP, VIS 0.15µm 1.8V/5V BCD GIII Process
The ATO0004KX8VI150BG33NA is organized as a 4K-bits by 8 one-time programmable.
64x8 Bits OTP (One-Time Programmable) IP, UMC 55nm ULP standard CMOS core logic Process
The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP).
The ATO00128X8TS055ULP3NA is organized as 128x8 one-time programmable (OTP) in 8-bit read and 1-bit program modes.
1x32 Bits OTP (One-Time Programmable) IP, TSMC 0.18um SiGe BiCMOS 1.8V/3.3V Process
The ATO0001X32TS180SGE3NA is organized as 1 by 32 bits one-time programmable (OTP).
768x39 Bits OTP (One-Time Programmable) IP, TSMC 55ULP 0.9V–1.2V / 2.5V Process
The ATO0768X39TS055ULP4NA is organized as 768x39 one-time programmable (OTP).
16Kx33 Bits OTP (One-Time Programmable) IP, TSMC 40LP 1.1V/2.5V Process
The ATO016KX33TS040LLP7ZA is organized as 16K-bits by 33 one-time programmable (OTP).
4Kx9 Bits OTP (One-Time Programmable) IP, GF 12LP+ 0.8V/1.8V Process
The ATO0004KX9GF012LPP8ZA is organized as 4K-bits by 9 one-time programmable (OTP).
512x8 Bits OTP (One-Time Programmable) IP, TSMC 12FFC 0.8V/1.8V Process
The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP).
For device makers, a small, inexpensive, low-power chip that can run the large AI models is needed to lead the market with their …
USB 2.0 PHY IP, Silicon Proven in TSMC 16FFC
The entire physical layer (PHY) IP solution for USB 2.0 was created to provide exceptional performance and consume little power.
Vision DSP built using 128-bit SIMD and offering up to 0.4 TOPS of performance
Built using 1024-bit SIMD and offering up to 3.84TOPS of performance The Cadence® Tensilica® Vision Q8 DSP delivers up to 3.84 te…
Cache-Coherent HiFi 5s Symmetric Multiprocessor
Efficient 32-bit processing for audio enhancement algorithms, wideband voice codecs, and multi-channel audio The Cadence® Tensili…
Efficiently supports front-end audio processing like beamforming and noise reduction, as well as neural network-assisted speech r…
High-performance, low-latency PHY for D2D connectivity
ULL TCP/IP, UDP/IP Offload Engine
High-performance TCP and UDP IP offload engine cores offer a reliable, ultra-low-latency solution for financial and network appli…
PUSCH Equalizer for 3GPP 5G NR
3GPP compliant equalisation, double uplink performance and spectral efficiency with this 5G NR Uplink Physical Shared Channel sol…
Embedded OTP (One-Time Programmable) IP, 256x32 bits for 0.9V/2.5V ULP
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being reliable and secure.
Embedded OTP (One-Time Programmable) IP, 512x16 bits for 1.8V/5V BCDA
eMemory's NeoBit OTP (One-Time Programmable) IP can be implemented seamlessly in various CMOS technologies such as logic, mixed-m…
Embedded OTP (One-Time Programmable) IP, 512x16 bits for 1.8V/3.3V Logic
eMemory's NeoBit OTP (One-Time Programmable) IP can be implemented seamlessly in various CMOS technologies such as logic, mixed-m…
Embedded OTP (One-Time Programmable) IP, 1280x8 bits for 5V BCD_PLUS
eMemory's NeoBit OTP (One-Time Programmable) IP can be implemented seamlessly in various CMOS technologies such as logic, mixed-m…