Vendor: Attopsemi Technology Category: eFuse / OTP

128x8 Bits OTP (One-Time Programmable) IP, TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose Process

The ATO00128X8TS055ULP3NA is organized as 128x8 one-time programmable (OTP) in 8-bit read and 1-bit program modes.

TSMC 55nm GP Silicon Proven View all specifications

Overview

The ATO00128X8TS055ULP3NA is organized as 128x8 one-time programmable (OTP) in 8-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming,
configuration setting, feature selection, and PROM, etc.

Key features

  • Fully compatible with TSMC 55nm LP 1.2V*/2.5V & ULP 0.9V*/2.5V CMOS process
  • Wide voltage range: 0.81 V (0.9 V-10%)–1.32 V (1.2 V+10%) read voltage and 2.5 V± 5% program voltage
  • High speed: 10-µs program time per bit, & 100-ns read cycle time (10 Mhz, max.), 8-bit at a time
  • Ultra-low read energy: <3 pJ per bit
  • Wide operating temperature range: -40°C to 85°C for read and 10 °C to 40 °C temperature for program

Benefits

  • Small IP size
  • Wide voltage range
  • High reliability
  • Wide operating temperature range
  • Silicon characterized and qualified

What’s Included?

  • Datasheet
  • Verilog behavior model and test bench
  • Timing library
  • LEF File
  • Phantom GDSII database

Silicon Options

Foundry Node Process Maturity
TSMC 55nm GP Silicon Proven

Specifications

Identity

Part Number
ATO00128X8TS055ULP3NA
Vendor
Attopsemi Technology
Type
Silicon IP

Provider

Learn more about eFuse / OTP IP core

DENSO Adopts Attopsemi's OTP to Upgrade Future Automotive Products

Attopsemi Technology, a leading provider of OTP IP (One-Time Programmable intellectual property), announced today a series of collaboration with Denso Corporation, a global supplier of automotive technology, to upgrade 180nm SOI technology, facilitating future installations of automotive products.

Frequently asked questions about eFuse / OTP IP cores

What is 128x8 Bits OTP (One-Time Programmable) IP, TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose Process?

128x8 Bits OTP (One-Time Programmable) IP, TSMC 55nm LP 1.2V/2.5V & ULP 0.9V/2.5V Mixed-Signal, General Purpose Process is a eFuse / OTP IP core from Attopsemi Technology listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this eFuse / OTP?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this eFuse / OTP IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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