Analog Bits develops, delivers and supports industry-leading, mixed signal IP solutions. The current product portfolio includes energy-efficient and low-area SERDES, PVT sensors, ultralow-jitter clocks, memory interfaces and I/O’s, available on every mainstream manufacturing process. Customers’ applications span a wide range including: high-volume consumer products, energy-efficient servers and advanced telecommunications equipment - all leveraging Analog Bits’ highly differentiated IP products.
Founded in 1995, Analog Bits, Inc. has become the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SOCs. Our products include precision clocking macros such as PLLs & DLLs, programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s as well as specialized memories such as high-speed SRAMs and TCAMs. With billions of IP cores fabricated in customer silicon, from 0.35-micron to 14-nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.
PCI Express Gen3 SERDES PHY on Samsung 28LPP
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports…
PCI Express Gen3 / SATA3 SERDES PHY on Samsung 28FDSOI
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
ONFI 3.0 Compatible I/O Buffer on TSMC CLN28HPL
The ONFI 3.0 compatible I/O buffer provides a high-speed physical interface solution to support the increasing bandwidths demande…
Multi Rail LDO for SERDES on TSMC CLN3P-CLN3X
The regulator macro addresses typical SOC power supply and other voltage regulation needs in a fully integrated easy-to-use macro.
Multi Rail LDO for SERDES on TSMC CLN3E
The regulator macro addresses typical SOC power supply and other voltage regulation needs in a fully integrated easy-to-use macro.
Multi Rail LDO for SERDES on TSMC CLN2P
The regulator macro addresses typical SOC power supply and other voltage regulation needs in a fully integrated easy-to-use macro.
Low Power Wide Range PLL on GLOBALFOUNDRIES 65LPE
The Low Power Wide Range PLL addresses markets and applications that demand very low power and optimized for area efficiencies.
Low Power Wide Range PLL on GLOBALFOUNDRIES 40LP
The Low Power Wide Range PLL addresses markets and applications that demand very low power and optimized for area efficiencies.
Low Power Wide Range PLL on GLOBALFOUNDRIES 28SLP
The Low Power Wide Range PLL addresses markets and applications that demand very low power and optimized for area efficiencies.
Low Power PLL on TSMC CLN90G-GT-LP
The low-power wide range PLL addresses markets and applications that demand very low power and optimized for area efficiencies.
The Low Power Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock…
Low Power PLL on TSMC CLN40LP-ULP
The Low Power Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock…
The Low Power Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock…
Low Power PCIe3/SATA3 Gen3 PHY on TSMC CLN28HPC+
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
Low Power PCIe Gen3 PHY on TSMC CLN16FFC
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
Low Power PCIe Gen3 PHY on TSMC CLN12FFC
The Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS).
Low Power FracN/SSCG PLL on TSMC CLN6FF
The low power Fractional-N SSCG PLL addresses power sensitive designs required for IOT, mobile and other low power applications n…
Low Power Frac-N PLL on GLOBALFOUNDRIES 40LP
A programmable on-the-fly Fractional-N PLL is required to lock to an incoming clock source and produce an output clock.
Low Power Frac-N on TSMC CLN28HPC+
A programmable on-the-fly Fractional-N PLL is required to lock to an incoming clock source and produce an output clock.
Low Power Frac-N on TSMC CLN28HPC
A programmable on-the-fly Fractional-N PLL is required to lock to an incoming clock source and produce an output clock.