Vendor: Analog Bits Inc. Category: High-Speed

ONFI 3.0 Compatible I/O Buffer on TSMC CLN28HPL

The ONFI 3.0 compatible I/O buffer provides a high-speed physical interface solution to support the increasing bandwidths demande…

TSMC 28nm HPL View all specifications

Overview

The ONFI 3.0 compatible I/O buffer provides a high-speed physical interface solution to support the increasing bandwidths demanded by today’s high-performance NAND Flash interface applications. The I/O buffer delivers performance up to 200MHz (400Mbps data rate), and serves as the integral physical link between the NAND Flash controller / PHY interface and the latest NAND Flash devices.

Specifications Parameter Min Typ Max Units IO Supply Voltage 1.7 1.8 1.95 V Core Supply Voltage 0.99 1.1 1.21 V Operating Temperature 0 25 125 °C AC Performance 200 MHz Data Rate 400 Mbps Note: All performance specifications are subject to package and topology Deliverables and EDA Design Views Front-end Design Views (with NDA) Back-end Design Views (with License Agreement) Verilog Model GDSII stream file Synopsys (LIB) CDL/Spice netlist Footprint (LEF) Application Notes inclusive of design integration Datasheet (PDF) guidelines (PDF)

Key features

  • High speed, source synchronous, bi-directional I/O buffer supporting the Open NAND Flash Interface (ONFI) 3.0 standard
  • Operation up to 200MHz DDR (400Mbps) performance with single load topology
  • Designed with core and 1.8V IO oxide devices
  • Built-in ODT (On-Die Termination)
  • Peripheral IO construction for Wirebond CUP implementation (option available to support Flip- Chip packaging)
  • Low power, ideal for supporting portable and mobile device applications

Silicon Options

Foundry Node Process Maturity
TSMC 28nm HPL —

Specifications

Identity

Part Number
ONFI 3.0 Compatible I/O Buffer on TSMC CLN28HPL
Vendor
Analog Bits Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about High-Speed IP core

Analog Bits to Participate in a Customer Test Chip Tapeout on TSMC A14 and Present Papers with Cerebras, Arm and Socionext on Real-Time On-Chip Power Sensing and Delivery at 2026 TSMC Global OIP Ecosystem Events

At TSMC 2026 North America OIP Ecosystem Forum, Analog Bits will showcase new real-time power observability and sensing analog IP in TSMC’s N2P process technology and present a paper with Cerebras; Papers planned with partners at global OIP Ecosystem events to highlight smarter power delivery for scalable SoCs targeting data centers, automotive and more.

Frequently asked questions about High-Speed I/O Pad IP

What is ONFI 3.0 Compatible I/O Buffer on TSMC CLN28HPL?

ONFI 3.0 Compatible I/O Buffer on TSMC CLN28HPL is a High-Speed IP core from Analog Bits Inc. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this High-Speed?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this High-Speed IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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