UHS-II is Ultra High speed type II controller for high speed transfers used in SD application for High definition contents.
- SD / eMMC Controller
- In Production
- Immediate
System peripheral IP cores are essential building blocks in modern SoC and ASIC designs, providing control, management, and support functions for the overall system operation.
This category includes a wide range of peripheral functions such as DMA controllers, interrupt controllers, monitoring and health management blocks, power management controllers, storage-related controllers, system controllers, and timers & watchdogs. These IP cores help coordinate data movement, system supervision, power optimization, fault detection, and overall platform management.
This catalog allows you to explore and compare system peripheral IP cores from leading vendors based on functionality, performance, power consumption, and process node compatibility.
Whether you are designing embedded systems, automotive platforms, or industrial controllers, you can find the right peripheral IP to support your system architecture.
UHS-II is Ultra High speed type II controller for high speed transfers used in SD application for High definition contents.
DTI SD host controller facilitates host equipment to communicate with SD card.
Dolphin Technology delivers custom, synthesizable IP to support specific design requirements.
Reset Verification IP can be used to generate reset signals in testbench.
Partial Reconfiguration Bitstream Monitor IP
The Partial Reconfiguration (PR) Bitstream Monitor can be used to identify partial bitstreams as they flow through the design.
Partial Reconfiguration AXI Shutdown Manager IP
The Partial Reconfiguration (PR) AXI Shutdown Manager can be used to make the AXI interfaces between a Reconfigurable Partition a…
Clock Verification IP can be used to generate clock signals in testbench.
NVMe IP core -- Directly connect PCIe SSD without external memory
NVMe IP core is standalone NVMe Host Controller with built-in optimized PCIe Bridge and Internal Memory Buffer, designed to handl…
Platform Manager Utility Function Core IP
Platform Management Core IP adds two key power-management functions to Platform Manager: Fault Logging and Enhanced Closed-loop T…
The Multi-Channel Direct Memory Access (MCDMA) Controller is designed to improve microprocessor system performance by allowing ex…
System Integrated Logic Analyzer (System ILA)
The customizable System Integrated Logic Analyzer (System ILA) IP core is a logic analyzer which can be used to monitor the inter…
The AXI MCDMA facilitates large data migration, offloading the task from the embedded processor.
SATA Host on Xilinx Zynq Artix 7
The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 F…
SATA 3 HOST IP on ARRIA 10 FPGA
The LDS-SATA3-HOST-A10GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a INTEL AR…
The LDS SATA 2 HOST_C5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a ALTERA C…
SGC22300_IP007703_GF_22FDX is a Real Time Clock (RTC) based on the SGC21510 solution.
The LogiCORE™ IP System Management Wizard provides a solution for system-monitoring Xilinx UltraScale™ architecture-based devises.
The Xilinx Processor System Reset Module design allows the customer to tailor the design to suit their application by setting cer…
Partial Reconfiguration Decoupler IP
The Partial Reconfiguration (PR) Decoupler IP provides logical isolation capabilities for PR designs.
Partial Reconfiguration Controller
The Partial Reconfiguration Controller (PRC) IP provides management functions for Partial Reconfiguration designs.