VISENGI's SHA-2 Secure Hash Algorithm IP core has been developed to be the highest throughput SHA-2 cryptographic hasher while at…
- SHA2
Cryptography IP cores provide hardware-based security functions for protecting data, communications, and digital assets in modern SoC and ASIC designs. By offloading cryptographic operations from software, these IP cores deliver higher performance, lower latency, improved energy efficiency, and stronger resistance to security attacks.
This category includes Symmetric Cryptography, Public Key Cryptography, Post-Quantum Cryptography (PQC), Hash / MAC, and Random Number Generator (RNG) IP solutions. Available implementations may support algorithms such as AES, ChaCha20, RSA, ECC, ML-KEM, ML-DSA, SHA-2, SHA-3, HMAC, CMAC, and true or deterministic random number generation technologies required for secure key management and authentication.
This catalog enables semiconductor engineers to evaluate and compare Cryptography IP from leading vendors based on supported algorithms, security certifications, throughput, latency, power consumption, silicon area, side-channel resistance, quantum-safe capabilities, and semiconductor process node compatibility.
VISENGI's SHA-2 Secure Hash Algorithm IP core has been developed to be the highest throughput SHA-2 cryptographic hasher while at…
SHA1, SHA2 Cryptographic Hash Cores
The SHA cores provide implementation of cryptographic hashes SHA-1 (core SHA1), SHA-2 (cores SHA2-256 and SHA2-512).
SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2…
SHA-1, SHA-2, SHA-3 Hash based HMAC, accelerators
HMAC-IP-59 (EIP-59) is IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algor…
High-Performance SHA-2/HMAC Accelerator with Full SHA-2 Family Support and Low Latency SCA/FI Protection FortifyIQ’s SHA-2/HMAC I…
HMAC-SHA256 Secure Core - Hardware Accelerator for SHA-2 and HMAC with Low Latency SCA/FI Protection
Hardware Accelerator for SHA-2 and HMAC with Low Latency SCA/FI Protection FortifyIQ’s SHA-2/HMAC IP core delivers high-speed, ha…
The CRYPT-IP-120 combines local key storage, an AES cipher (AES-IP-39), a SHA-2 hash (HASH-IP-57) and DMA capability into an easy…
Hash and HMAC Functions Accelerator
The DSHA2-384 - a universal solution that accelerates SHA2-384 hash with HMAC mode.
SHA IP Core with native SHA2-256 HMAC support
The DSHA2-256 is a universal solution which efficiently accelerates SHA2-256 hash function compliant with FIPS PUB 180-4.
Multi-Protocol Engine with Classifier, Inline and Look-Aside, 10-100 Gbps
The Protocol-IP-197 Multi-Protocol Engine is an IP family for accelerating IPSec, SSL, TLS, DTLS (CAPWAP), 3GPP and MACsec up to …
Security Hash, SM3 Hash and HMAC Engine
The hash processor is a fully compliant implementation of the secure hash algorithm (SHA-1, SHA-224, SHA-256, SHA-384, SHA-512), …
Secure Hash Algorithm 256 IP Core
A universal solution that effectively accelerates the SHA2-256 hash function conforming with FIPS PUB 180-4 is the SHA2-256 bridg…
Secure Hash Algorithm 512 IP Core
A universal solution that effectively accelerates the SHA2-512 hash function complying with FIPS PUB 180-4 is the SHA2-512 bridge…
Secure Hash Algorithm 384 IP Core
Bridge to APB, AHB, and AXI bus SHA2-384 is a universal solution that effectively speeds up the SHA2-384 hash function that compl…
ChaCha20 DPA Resistant Crypto Accelerator
Rambus DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integra…
Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
The Protocol-IP-196 Multi-Protocol Engine is a protocol-aware packet engine for accelerating IPSec, SSL/TLS, DTLS, 3GPP and MACse…
NIST ESV certified, AIS-31, FIPS (SP800-90A/B/C) True Random Number Generator
The TRNG-IP-76 is a FIPS-compliant and certified IP core for True Random Number Generation (TRNG) with an optional post-processor…
Multi-Protocol Engine, Look-Aside, 1 Gbps
The Protocol-IP-93 Multi-Protocol Engine is a protocol-aware packet engine for accelerating IPSec, SSL/TLS, and SRTP up to 1 Gbps…
XMSS Post-Quantum Cryptography IP
XMSS is a Post-Quantum Cryptographic (PQC) algorithm, meaning it is mathematically designed to be robust against a cryptanalytic …
Lightweight, Scalable Cryptographic Accelerators for Secure SoC Designs The Cryptographic Cores IP portfolio delivers secure, hig…