HBM3 Solution enabling access to HBM3 Controller and HBM3 PHY in TSMC N5 1.2V
The HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard.
- Controller + PHY
HBM3 Solution enabling access to HBM3 Controller and HBM3 PHY in TSMC N5 1.2V
The HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard.
The HCLTech_gf40_gpio_i2c_i3c_bi_3p3v IP is a versatile and robust I3C IO interface designed to facilitate efficient communicatio…
LVDS I/O IP - High Frequency Transceiver
The Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data t…
The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
HBM3 PHY V2 (Hard 1) in TSMC (N3E)
The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
HBM3 PHY (Hard 1) in TSMC (N5)
The Synopsys HBM3 PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and net…
HBM2E PHY V2 in TSMC (N7, N6, N5)
The HBM2/HBM2E PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), graphics, and networking…
HBM2E PHY V2 (Hard 1) in TSMC (N7, N6, N5)
The Synopsys HBM2/HBM2E PHY is a physical layer IP interface (PHY) solution for high-performance computing (HPC), graphics, and n…
USB is the ubiquitous interconnect standard of choice for a wide range of computing and consumer applications.
PCIe 5.0/4.0/3.0 PHY & Controller
The PCIe 5.0 IP solutions combine high-performance controllers and PHYs, fully compliant with PCIe 5.0/4.0/3.0, and PIPE specific…
LVDS IO handling data rate up to 50Mbps with maximum loading 60pF
KA16UGLVDS01ST001 is a LVDS IO handling data rate up to 50Mbps with a maximum loading of 60pF.
55nm Specialized Analog I/O Library
Specialized Analog I/O Library with 1.2V, 1.8V, 3.3V, and 5V integrated Analog I/Os and ESD; includes a custom 12V I/O ESD soluti…
6.5V ESD Clamp in 180nm Technology
Standalone 6.5V ESD Power Clamp in 180nm technology for use in wirebond or flipchip.
A 65nm/55nm Wirebond IO Library with 1.2V to 3.3V GPIO and 5V ODIO
Full Custom IO Library.
Video Processing Unit IP The VPU IP is a video processing system that is suitable for high-speed and high resolution video system…
Video Processing Unit IP The VPU IP is a video processing system that is suitable for high-speed and high resolution video system…
Video Processing Unit IP The VPU IP is a video processing system that is suitable for high-speed and high resolution video system…
Video Processing Unit IP The VPU IP is a video processing system that is suitable for high-speed and high resolution video system…
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D…