E21 High-performance, full-featured Embedded processor
The SiFive E21 Standard Core is a high-performance, full-featured embedded processor designed to address microcontroller applicat…
Image Signal Processing Pipeline IP core
ISPIDO is a well established collection of IP Cores, enabling high resolution image signal processing and calibration on heteroge…
Intelligent Sensor and Power Management Design Platform
The IQonIC Works ISP is an integrated ASIC design platform for low power analog/mixed signal ASICs for IoT, Smart Home, Healthcar…
Virtual Machine Security with WorldGuard™ Integration
The SiFive IOMMU Gen 2 is a scalable address translation engine connecting DMA capable I/O devices to system memory.
C1 is a compact, fully programmable RISC‑V AI IP core for real‑time inference
Nios® V processors are the next generation of soft processor IPs, designed to bring the power and flexibility of the open-source …
ARC-V RMX Series Functional Safety Processor IP
The ARC-V™ RMX-110-FS and RMX-510-FS Functional Safety Processors simplify development of safety-critical applications and accele…
ComputeRAM is an SRAM macro with integrated compute capability.
The LP1-200 IP Platform is built around the Bluetooth 5 connectivity standard.
IP Platform for AI-Enabled IEEE 802.15.4 Smart Sensors
The LP1-120 IP Platform is built around the IEEE 802.15.4 connectivity standard.
IP Platform for BLE 5.2 IoT Sensors
The LP1-100 IP Platform is built around the BLE 5.2 connectivity standard.
AXI2CHI · CHI-AXI · CHI-CPI · AXI4-SFI
Multi-world Hardware Isolation for System Security
SiFive Insight is a trace and debug portfolio that accelerates HW/ SW validation for standalone SiFive RISC-V designs or mixed ve…
Open And Secure Distributed Security Architecture
SiFive Shield is a comprehensive portfolio of hardware security technologies designed for RISC-V processors and SoCs.
Clustered IP to Scale Throughput
When one engine isn’t enough, Atrevido Cluster multiplies throughput under the same ISA and memory‑first design (CPU/Vector, optionally Tensor‑equipped instances)
Scaled for heavier inference and higher throughput
Embedded HSM (Root of Trust) with Arm Cortex-M33 Processor
Automotive Grade ISO 26262 ASIL-B
AMBA Bus Host to eSPI Controller/Target
eSPI Controller/Target RTL SystemVerilog IP Core
AMBA Bus Host to eSPI Controller
The Digital Blocks DB-eSPI-Controller-AMBA is a fully compliant Intel Enhanced Serial Peripheral Interface (eSPI) Base Specificat…
eSPI Target RTL SystemVerilog IP Core