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Vendor:
Synopsys, Inc.
Category:
CPU
ARC-V RMX Series Functional Safety Processor IP
The ARC-V™ RMX-110-FS and RMX-510-FS Functional Safety Processors simplify development of safety-critical applications and accele…
Overview
The ARC-V™ RMX-110-FS and RMX-510-FS Functional Safety Processors simplify development of safety-critical applications and accelerate ISO 26262 certification of automotive system-on-chips (SoCs). The RMX Series safety processors support ISO 26262 ASIL D safety levels for both systematic development and random fault detection, offering tightly coupled dual-core lockstep (DCLS) implementations. For the RMX-510-FS, there is also an option to run the two cores in an independent “hybrid” mode for ASIL B or non-automotive applications requiring higher performance.
Integrated hardware safety features include ECC, user-programmable windowed watchdog timer, end-to-end protection (E2E) for buses/data-path, and a lockstep safety monitor. Options such as the FPU are instantiated within the main and shadow core for full redundancy while an optional advanced processor trace module (RISC-V N-Trace) can also be licensed.
The ARC-V RMX-110-FS and RMX-510-FS processors are supported by comprehensive safety work products and the MetaWare Toolkit for Safety with ASIL D certified compiler to generate ISO 26262 compliant code.
To maximize PPA of ARC-V RMX FS processor-based designs, a Fusion QuickStart Implementation Kit (QIK) that includes tool scripts, a baseline floorplan, design constraints and documentation, is available.
Key features
- Developed for full ASIL D compliance (systematic and random faults)
- Tightly-coupled dual-core safety implementation based on ultra-compact ARC-V RMX processors
- Single solution support for safety level up to ASIL D; Supports both ASIL D lockstep operation or ASIL B single-core operation (RMX-510-FS only)
- Integrated hardware safety features including ECC, user-programmable windowed watchdog timer, end-to-end protection (E2E) for buses/data-path, and lockstep safety monitor
- MetaWare Toolkit for Safety with ASIL D certified compiler
- Extensive safety documentation eases SoC certification process
Block Diagram
arc-v-rmx-fs block diagram
Benefits
- 32-bit safety-enabled RISC-V cores
- Targeting low-power, safety-critical applications
- Robust safety HW features to achieve ASIL D levels for systematic development flow and random hardware faults
Specifications
Identity
Part Number
arc-v-rmx-fs
Vendor
Synopsys, Inc.
Type
Silicon IP
Compute
CPU Architecture
RISC-V
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about CPU IP cores
What is ARC-V RMX Series Functional Safety Processor IP?
ARC-V RMX Series Functional Safety Processor IP is a CPU IP core from Synopsys, Inc. listed on Semi IP Hub.
How should engineers evaluate this CPU?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.