ultra-low memory IP Listing

The Compute Express Link™ (CXL™) 2.0 Controller (formerly XpressLINK) leverages a silicon-proven PCIe 5.0 controller architecture…

• CXL
• In production
• Available
• CXL, PCI-SIG

Ultra-low voltage logic designs using adaptive body biasing demand dense SRAM solutions which fully integrate in the ABB aware im…

• GlobalFoundries
• 22nm
• FDX
• Available on request

The PNG-E core implements a lossless image compression engine compliant with the Portable Network Graphics (PNG) file format spec…

• Image Conversion

QRoot Lite™ is a silicon IP solution designed specifically for resource-constrained MCUs and IoT devices.

• Root Of Trust

Based on a time-domain pixel-level A/D conversion, its patented pixel architecture enables the capture of high dynamic range imag…

• Temperature Sensor

The new Synopsys ARC® NPX Neural Processing Unit (NPU) IP family delivers the industry’s highest performance and support for the …

• NPU
• Available on request
• Available

The Synopsys ARC® SEM Family of performance-efficient, ultra-low power, compact security processors enables designers to integrat…

• Security Coprocessor
• Available on request
• Available

Dubhe-70 is a 9+ stage, 3-issue, out-of-order CPU IP that supports the rich RISC-V instruction set, RV64GCBH_Zicond_Zicbom_Zicboz…

• RISC-V

Delivers excellent performance in addition to high utilization and ultra-low latency, achieved by its proprietary out-of-scheduli…

• Controller

The Synopsys ARC® EM Family, based on the ARCv2 instruction set architecture (ISA) includes ARC EM4 and EM6, DSP-enhanced EMxD pr…

• MCU
• Available on request
• Available

Single port SRAM compiler with low power retention mode.

• SRAM

Single Port SRAM Compiler with Low Power Retention Mode and Ultra Low Leakage Bit Cell Power Supply (V) 6T 0.9

• SRAM
• Qualified
• now

Single port SRAM compiler with low power retention mode.

• SRAM
• now

S802 utilizes a 2-stage minimalistic pipeline that provides nearly 20 special protection technologies for various invasive and no…

• CPU

E902 utilizes a 2-stage minimalistic pipeline compatible with RISC-V architecture, and is enhanced in execution efficiency.

• RISC-V

E802 utilizes a 2-stage minimalistic pipeline and optimizes average and peak power consumption.

• CPU

Jointwave's AVC Intra Codec just needs very low resource on both FPGA & ASIC.

• H.264 / AVC

Weebit ReRAM (Resistive Random Access Memory) is an Non-Volatile Memory (NVM) technology that can be easily integrated into any C…

• DB HiTek
• 130nm
• BCD
• Silicon Proven

The PowerVR Series9XE family features include: an scalable compute cluster architecture; high efficiency compression technology i…

• GPU

The ASRC core is a compact and high-performance audio sample rate converter.

• Filters Transforms