Vendor: Nordic Semiconductor Seattle Category: SRAM

Single Port High Speed SRAM Memory Compiler on N22ULL

Single port SRAM compiler with low power retention mode.

Overview

Single port SRAM compiler with low power retention mode. High speed, pins on side

Bit Cell Power Supply (V)
6T 0.9

Key features

  • High Performance: Array is split into multiple banks to reduce the length of each bit line improve timing. 
  • Ultra-Low Leakage: High VT (HVT)  devices are used with source biasing to minimize leakage currents.
  • Bit Cell: Utilizes Premier Fab’s Low Leakage 6T bit cells to ensure high manufacturing yields
  • Ultra Low Power Standby: Dedicated Standby mode with optional built in source biasing. 
  • Isolated Array and Periphery supplies: Periphery voltage can be shut off to further reduce standby power
  • Data Write-Through: Pin controllable write through disables data out transitions during a write to reduce power. During ATPG data out is controllable to ensure full coverage
  • Error Correction: Single bit error correction and dual bit error detection (SECDED) is optionally included in the synthesizable wrapper.

Block Diagram

SP-HS-TS22ULL block diagram

Specifications

Identity

Part Number
SP-HS-TS22ULL
Vendor
Nordic Semiconductor Seattle
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about SRAM IP core

Frequently asked questions about SRAM IP cores

What is Single Port High Speed SRAM Memory Compiler on N22ULL?

Single Port High Speed SRAM Memory Compiler on N22ULL is a SRAM IP core from Nordic Semiconductor Seattle listed on Semi IP Hub.

How should engineers evaluate this SRAM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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