Vendor: Weebit Nano Category: MRAM / RRAM

ReRAM NVM in DB HiTek 130nm BCD

Weebit ReRAM (Resistive Random Access Memory) is an Non-Volatile Memory (NVM) technology that can be easily integrated into any C…

DB HiTek 130nm BCD Silicon Proven View all specifications

Overview

Weebit ReRAM (Resistive Random Access Memory) is an innovative Non-Volatile Memory (NVM) technology that can be easily integrated into any CMOS IC.

It is a high-performance and very low-power NVM, achieving 10K programming cycles and 10 years’ retention at high temperatures.

The technology is available in DB HiTek 130nm BCD process, tested on silicon, and ready for integration in user SoCs. The Weebit ReRAM IP module is provided in a wide range of features and can be customized per customers’ needs.

DB HiTek 130nm BCDMOS Process

Based in Korea, DB HiTek is a specialized foundry with leading analog and power semiconductor technology. Its technologies run in high volume and at world-class quality levels, as demonstrated by the company’s numerous quality-driven certifications. The company’s 130nm (0.13μm) BCDMOS (Bipolar CMOS-DMOS) process is optimized to increase power efficiency and low-power performance for analog, mixed-signal, and power management designs.

DB HiTek’s 130nm technology node supports up to 120V BCDMOS in addition to CMOS 1.5V and 5V devices. It supports up to six aluminum metal layers and is mixed-signal enabled. It offers a variety of CMOS thresholds to optimize for power and performance.

Feature Specifications

Technology DB HiTek 130LVA 130nm
Mask Adder 2
Supply Voltage 1.5V+/- 10% Read, 3.3V+/- 10% Program
Read Access Time <25nsec
Operation Temp. -40°C to 125°C
Capacity 1024 Kbit (1Mb) / 512Kb / 256Kb / 128Kb / 64Kb
Data Bus Width (Read) 32-bit (can be customized to 16-bit to 128-bit)
System Interface AHB (can be customized QSPI or other)
Endurance (Write cycles) 10K (can be extended to 100K)
Data Retention >10 years @125°C
XiP (Execute in Place) Special bus interface to enable firmware execution directly from the ReRAM
OTP Configurable ReRAM sector for trimming and configuration bits

Key features

  • 10K cycles endurance
  • >10 years retention at 125°C
  • Ultra-low power consumption
  • Low-cost NVM – requires only two additional masks
  • Tolerant to ionizing radiation and electromagnetic interference
  • Inherently secure technology
  • Back-end-of-line (BEOL) technology for integration flexibility

Block Diagram

Benefits

  • Excellent endurance and retention even at high temperatures
  • Ultra-low power consumption
  • Tolerant to ionizing radiation and electromagnetic interference
  • Inherently secure technology
  • Low-cost NVM – Requires only 2 additional masks
  • Back-end-of-line (BEOL) technology for integration flexibility

Applications

Weebit ReRAM IP for the DB HiTek 130nm BCD process can provide advantages for a broad range of applications, including:

  • Analog, power management, mixed-signal designs
  • IoT, industrial, automotive
  • Radiation-tolerant designs
  • Data logging applications

What’s Included?

  • Data sheet
  • Integration guide
  • Memory map
  • Verilog model
  • LEF
  • CDL
  • Timing constraints

Silicon Options

Foundry Node Process Maturity
DB HiTek 130nm BCD Silicon Proven

Specifications

Identity

Part Number
WBT-SKYT-S130-v256-ReRAM
Vendor
Weebit Nano

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Israel

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Frequently asked questions about MRAM / RRAM IP cores

What is ReRAM NVM in DB HiTek 130nm BCD?

ReRAM NVM in DB HiTek 130nm BCD is a MRAM / RRAM IP core from Weebit Nano listed on Semi IP Hub. It is listed with support for dbhitek Silicon Proven.

How should engineers evaluate this MRAM / RRAM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MRAM / RRAM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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