Configurable CAN Bus Controller with Flexible Data-Rate
CAN FD FULL IP Core is a missing gap between CAN FD and CAN XL.
- CAN / CAN-FD / CAN-XL
- Now
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
Configurable CAN Bus Controller with Flexible Data-Rate
CAN FD FULL IP Core is a missing gap between CAN FD and CAN XL.
The MIPI RFFE Master controller IP is a optimized and technology agnostic implementation of the MIPI RFFE v.3.1 standard targetin…
USB 2.0 PHY IP, Silicon Proven in TSMC 16FFC
The entire physical layer (PHY) IP solution for USB 2.0 was created to provide exceptional performance and consume little power.
High-performance, low-latency PHY for D2D connectivity
ULL TCP/IP, UDP/IP Offload Engine
High-performance TCP and UDP IP offload engine cores offer a reliable, ultra-low-latency solution for financial and network appli…
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 55 ULP
The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specific…
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 40 LP
The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-…
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 40 LP
Many production nodes use the C-PHY/D-PHY Combo because it uses the fewest resources and energy.
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 40 LP
C-PHY/D-PHY Combo in various production nodes at low cost and power.
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 28 HPC+
Several production nodes employ C-PHY/D-PHY Combo to consume the least amount of energy and funds.
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 28 HPC+
C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes.
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 22 ULP
In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo.
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 22 ULP
C-PHY/D-PHY Combo in numerous process nodes at low cost and power.
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 16 FFC
In order to use the least amount of power and money, several production nodes use C-PHY/D-PHY Combo.
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 16 FFC
Low power and cost C-PHY/D-PHY Combo in multiple process nodes.
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 12 FFC
Several production nodes employ C-PHY/D-PHY Combo with the least amount of power and expense.
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 12 FFC
C-PHY/D-PHY Combo in various process nodes with low power and cost.
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 7 FF
Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes.
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 7 FF
Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes.
MIPI D-PHY Rx IP, Silicon Proven in TSMC 40LP
The D-PHY specification, version 1.2, is fully complied with by the MIPI D-PHY Analog RX IP Core.