Vendor: M31 Technology Corp. Category: Multi-Protocol PHY

SerDes PHY IP in TSMC (7nm, 12/16nm, 22nm, 28nm)

M31 Serdes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications.

TSMC 7nm N7+ View all specifications

Overview

M31 Serdes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications. The Serdes IP supports data rates from 1.25G to 10.3125Gbps including XFI, SFI, 10GBASE-KR, CEI, XAUI, USXGMII, QSGMII, and SGMII. With the supports for both TX and RX equalization techniques, the Serdes IP is designed to meet the requirements for different channel conditions.

Key features

  • Supports 1.25G to 10.3125Gbps data rates and compact die area
  • Supports up to 25dB channel loss@ 5.15625GHz
  • Supports RX loss-of-signal detection
  • Supports X1, X2 and X4 lanes
  • Accessible register controls allow user specific optimization of critical parameters (e.g., TXPLL bandwidth, TX de-emphasis level, CDR bandwidth, and EQ strength)
  • Supports both FOM for Link-EQ Training
  • Supports robust BIST functions for mass production testing
  • Support Wire-Bond and Flip-Chip packages
  • Support robust BIST functions for mass production tests
  • Support Wire-Bond and Flip-Chip packages
  • Available in 28nm and 16nm/12nm process nodes

Silicon Options

Foundry Node Process Maturity
TSMC 7nm N7+ —

Specifications

Identity

Part Number
M31 Serdes 10G/5G IP
Vendor
M31 Technology Corp.
Type
Silicon IP

Provider

Learn more about Multi-Protocol PHY IP core

M31 Expands Rambus Collaboration, Strengthening Its One-Stop MIPI Subsystem Solution

This collaboration combines these controller capabilities with M31’s silicon-proven MIPI PHY portfolio with a strong track record of successful deployments, enabling M31 to offer a comprehensive MIPI subsystem solution integrating high-speed MIPI PHYs and MIPI CSI/DSI controllers to address the growing requirements of high-resolution imaging and display applications.

M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C

With the rapid growth of AR/VR and high-resolution imaging systems such as drones and action cameras, MIPI CSI (Camera Serial Interface) and MIPI DSI (Display Serial Interface) require both high data throughput and low power consumption. M31 provides a MIPI C-PHY and D-PHY IP combo solution implemented on TSMC N3P and N3C processes.

M31 Gains Momentum in Advanced Processes, Targets Double-Digit Growth in 2026

Consolidated revenue for the first quarter reached NT$395 million, representing a year-over-year decrease of 9.2%. The decline was primarily attributable to timing fluctuations in contract signings for certain key advanced-node customers in North America, with the related revenue expected to be recognized in the second quarter.

Frequently asked questions about Multi-Protocol PHY IP cores

What is SerDes PHY IP in TSMC (7nm, 12/16nm, 22nm, 28nm)?

SerDes PHY IP in TSMC (7nm, 12/16nm, 22nm, 28nm) is a Multi-Protocol PHY IP core from M31 Technology Corp. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this Multi-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Multi-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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