Vendor: M31 Technology Corp. Category: Single-Protocol PHY

USB2.0 Dual-Role PHY, SMIC 40LL

M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power co…

USB 2.0 SMIC 40nm LL View all specifications

Overview

M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power consumption. M31 utilizes a whole new design architecture to implement the USB 2.0 IP without sacrificing the performance associated with USB 2.0. The USB 2.0 IP is not only suitable for USB peripherals, but also an optimized solution for SOCs that desire multiple USB ports.

Key features

  • Smallest USB 2.0 PHY IP worldwide (IP size of 55nm, 40nm, 28nm, and 16/12nm are less than 0.2mm2)
  • Fully compliant with Universal Serial Bus (USB) 2.0 electrical specification
  • Compliant with UTMI+ specifications (High-Speed, Full-Speed, and Low-Speed functions)
  • Supports clock inputs from 10/12/19.2/24/25/27/30/40MHz crystal oscillator or external clock source
  • Integrated PLL to provide a variety of stand-alone clock outputs for USB related applications

Silicon Options

Foundry Node Process Maturity
SMIC 40nm LL —

Specifications

Identity

Part Number
USB2.0 Dual-Role PHY, SMIC 40LL
Vendor
M31 Technology Corp.
Type
Silicon IP

Standards & Interfaces

Supported Standards
USB 2.0

Provider

Learn more about Single-Protocol PHY IP core

M31 Expands Rambus Collaboration, Strengthening Its One-Stop MIPI Subsystem Solution

This collaboration combines these controller capabilities with M31’s silicon-proven MIPI PHY portfolio with a strong track record of successful deployments, enabling M31 to offer a comprehensive MIPI subsystem solution integrating high-speed MIPI PHYs and MIPI CSI/DSI controllers to address the growing requirements of high-resolution imaging and display applications.

M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C

With the rapid growth of AR/VR and high-resolution imaging systems such as drones and action cameras, MIPI CSI (Camera Serial Interface) and MIPI DSI (Display Serial Interface) require both high data throughput and low power consumption. M31 provides a MIPI C-PHY and D-PHY IP combo solution implemented on TSMC N3P and N3C processes.

M31 Gains Momentum in Advanced Processes, Targets Double-Digit Growth in 2026

Consolidated revenue for the first quarter reached NT$395 million, representing a year-over-year decrease of 9.2%. The decline was primarily attributable to timing fluctuations in contract signings for certain key advanced-node customers in North America, with the related revenue expected to be recognized in the second quarter.

Frequently asked questions about Single-Protocol PHY IP

What is USB2.0 Dual-Role PHY, SMIC 40LL?

USB2.0 Dual-Role PHY, SMIC 40LL is a Single-Protocol PHY IP core from M31 Technology Corp. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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