V-Trans ‘s FPD Link Receiver Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow …
- Single-Protocol PHY
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Single-Protocol PHY IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare Single-Protocol PHY IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
V-Trans ‘s FPD Link Receiver Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow …
FPD-link, 30-Bit Color LVDS Receiver, 20-112Mhz
V-Trans 's FPD Link Receiver Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow …
V-Trans ‘s FPD Link Receiver Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow …
FPD-link, 30Bits Color LVDS Receiver, 150Mhz (SVGA/WXGA)
Now available up to 150Mhz (90Mhz previously) V-Trans 's FPD Link Receiver Macro is based on National Semiconductor openLDI speci…
LVDS Receiver 1250Mb/s, 800Mhz clock
V-Trans 's LVDS technology solutions eliminate the trade-offs in speed, low power, low noise (EMI), and BOM cost saving for high …
LVDS Transmitter 1250Mb/s, 800Mhz clock with RSDS support
V-Trans 's LVDS technology solutions eliminate the trade-offs in speed, low power, low noise (EMI), and BOM cost saving for high …
Video LVDS SerDes Transmitter-Receiver IP Core
The Video LVDS SerDes Transmitter / Receiver IP Core provides a , easy-to-use Serializer/Deserializer (SerDes) solution to interf…
The TRC5024CPA is a four lane Gen 1 and 2 PCI Express Physical layer (Phy) Phy IP core, delivering high-speed serial data transmi…
Clock and Data Recovery of HDB3/B3ZS coded signals
An all-digital solution suitable for clock/data recovery of HDB3/B3ZS coded signals.
32 Gbps PCIe-class links, 4-tap Tx FIR, CTLE, 12-tap DFE, 30 dB IL target
TSMC N5A SD/eMMC PHY AG2 Platform
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
TSMC N3P SD/eMMC PHY North/South Poly Orientation MS add-on
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
TSMC N3P SD/eMMC PHY North/South Poly Orientation
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
TSMC N3E SD/eMMC PHY North/South Poly Orientation
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
TSMC N3A SD/eMMC PHY AG2 North/South Poly Orientation
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
Samsung 8LPU 1.8V/3.3V SD/eMMC PHY AP1
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
Samsung 5LPE 1.8V/3.3V SD/eMMC PHY AP2
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
USB 4.0 V2 PHY - 4TX/2RX, TSMC N3P , North/South Poly Orientation
The USB4 PHY IP provides designers with the industry's best combination of small area and low power with support for the process …
USB4 PHY - TSMC N4P 1.2V, North/South Poly Orientation
The USB4 PHY IP provides designers with the industry's best combination of small area and low power with support for the process …
USB4 PHY - TSMC N3E 1.2V, North/South Poly Orientation
The USB4 PHY IP provides designers with the industry's best combination of small area and low power with support for the process …