Vendor: StarIC Inc Category: Single-Protocol PHY

Long-Reach SerDes

32 Gbps PCIe-class links, 4-tap Tx FIR, CTLE, 12-tap DFE, 30 dB IL target

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Overview

Long-reach SerDes for automotive, robotics, and Physical AI applications. Asymmetric full-duplex architecture with deep equalization, silicon-proven with first silicon success.

Key features

  • 32 Gbps data rate
  • 4-tap Tx FIR, CTLE, 12-tap DFE
  • Targeting 30 dB insertion loss
  • Asymmetric full-duplex

Applications

  • Automotive connectivity
  • Physical AI
  • Robotics
  • PCIe-class long-reach channels

What’s Included?

  • GDS layout database
  • Liberty timing models (.lib)
  • LEF layout exchange format
  • Documentation available
  • Integration support package
  • Schematics available

Specifications

Identity

Part Number
long-reach-serdes
Vendor
StarIC Inc

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

StarIC Inc
HQ: Canada
StarIC enables innovative and high-performance ASIC and system solutions and IP. Based in Toronto, Canada our team is led by industry veterans and highly experienced experts in the field of mixed-signal design. Many have worked together as a team through prior companies for a number of years. In addition to extensive experience managing and running semiconductor companies, all of StarIC’s leadership have strong engineering backgrounds. At StarIC world-class engineering is at the core of our identity.
Contact StarIC Inc

Learn more about Single-Protocol PHY IP core

UFS Goes Mainstream

UniversalFlash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniPro as well as eMMC form factors to simplify adoption and development.

Design IP Faster: Introducing the C~ High-Level Language

In this paper, we introduce a new high-level, dataflow programming language called C~ (“C flow”) that further increases productivity by raising the level of abstraction from behavioral descriptions, while overcoming the limitations of C for hardware design. We present the syntax and semantics of this language, and the framework that provides hardware and software code generation. This paper illustrates the benefits of using C~ for hardware design of a IEEE 802.3 MAC, synthesized for FPGA and for 90nm CMOS technology.

Universal Flash Storage: Mobilize Your Data

Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.

Can MIPI and MDDI Co-Exist?

Since MIPI and MDDI standards both target interfaces to cameras and displays on mobile devices, are two separate standards really needed?

Frequently asked questions about Single-Protocol PHY IP

What is Long-Reach SerDes?

Long-Reach SerDes is a Single-Protocol PHY IP core from StarIC Inc listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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