Vendor: V-Trans Microelectronics Category: Single-Protocol PHY

LVDS Receiver 1250Mb/s, 800Mhz clock

V-Trans 's LVDS technology solutions eliminate the trade-offs in speed, low power, low noise (EMI), and BOM cost saving for high …

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Overview

V-Trans 's LVDS technology solutions eliminate the trade-offs in speed, low power, low noise (EMI), and BOM cost saving for high performance data transmission applications.

This LVDS receiver is a very fast comparator that can recover very small differential signaling with a very wide common mode range, allowing a proper recovery of LVDS signals and its use with many other specification.

Two separate library are available: inline (VT18LVDSR-I) and staggered I/O configuration (VT18LVDSR-S).

Key features

  • • 1P6M layout structure based on 0.18um 1P6M 1.8V generic logic process.
  • • 3.3V/1.8V ±10% supply voltage, -40/+125°C temperature.
  • • IEEE Standard 1596.3-1996 and ANSI/TIA/EIA-644-A Specifications.
  • • Up to 1250Mb/s DDR, or 800Mhz clock.
  • • Optional 100Ω on die termination ±20%.
  • • Power down mode.
  • • CMOS input for chip testability (JTAG…)
  • • Rail to Rail Input common mode for extended compatibility with other specification.
  • • Do not require extra external bias circuit.
  • • Small area : [contact us]
  • • Comes with a set of ESD protected power pads, corner, filler and break cells for easy integration.
  • • Silicon proven, and test report available.

Benefits

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What’s Included?

  • The library includes:
  • - LVDS receiver with internal 100 Ohm termination,
  • - LVDS receiver without termination,
  • - a set of filler cells, power cells and corner cell,
  • - GDSII
  • - LVS netlist
  • - LIB timing
  • - LEF abstract
  • - Verilog/VHDL model
  • - Datasheet
  • - Application Note

Specifications

Identity

Part Number
VT18LVDSR
Vendor
V-Trans Microelectronics
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact V-Trans Microelectronics

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Frequently asked questions about Single-Protocol PHY IP

What is LVDS Receiver 1250Mb/s, 800Mhz clock?

LVDS Receiver 1250Mb/s, 800Mhz clock is a Single-Protocol PHY IP core from V-Trans Microelectronics listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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