Vendor: Xilinx, Inc. Category: Protocol Bridge

Zynq Bus Functional Model (BFM)

The ability to purchase Zynq BFM has been discontinued as of December 1, 2016.

Overview

The ability to purchase Zynq BFM has been discontinued as of December 1, 2016.  The existing AXI-BFM licenses will work perpetually in releases through 2016.4, but will not be supported after the Vivado 2016.4 release.

Zynq BFM will be replaced by Xilinx Zynq Verification IP in CY2017.  For more information please contact your Local Xilinx Sales Contact.

Key features

  • Pin compatible and Verilog Based simulation model
  • Supports all AXI interfaces
  • AXI 3.0 compliant
  • Sparse memory model (for DDR) and a RAM model (for OCM)
  • Verilog task-based API
  • Delivered in Vivado® Design Suite
  • Blocking and non-blocking interrupt support
  • Requires license to AXI BFM models

Specifications

Identity

Part Number
EF-AXI-BFM
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: USA

Learn more about Protocol Bridge IP core

Resilience in Space: Designing Radiation-Tolerant Systems

Space is easily the most challenging environment for IC designers. Without Earth’s atmosphere to protect them, electronic systems are vulnerable to high-energy (ionizing) radiation including alpha and beta particles, gamma and x-rays as well as galactic cosmic radiation.

Frequently asked questions about Protocol Bridge IP cores

What is Zynq Bus Functional Model (BFM)?

Zynq Bus Functional Model (BFM) is a Protocol Bridge IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP