28G LR Multi-Protocol SerDes (MPS) PHY - Samsung 14nm
Optimized for power and area, our line-up of SerDes PHYs, delivering maximum performance and flexibility.
- PHY
- Samsung
- 14nm
- In Production
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
28G LR Multi-Protocol SerDes (MPS) PHY - Samsung 14nm
Optimized for power and area, our line-up of SerDes PHYs, delivering maximum performance and flexibility.
MIPI D-PHY Transmitter/Receiver for Samsung 28nm FD-SOI
The MIPI® D-PHY Transmitter/Receiver is useful 4 Data Lanes transmitter/receiver hard macro for DSISM/CSI-2® of Samsung 28nm FD-SOI process.
HDMI 2.0 Receiver with MHL 2.0
IP
LVDS Driver/Buffer
LVDS Receiver
LVDS Transmitter
DisplayPort transmitter IP
DisplayPort Receiver IP
HDMI 1.4/2.0/2.1 transmitter IP
HDMI 1.4/2.0/2.1 transmitter IP
HDMI 1.4/2.0/2.1 receiver IP
MIPI C-PHY/D-PHY combo Rx
Samsung 28nm FDSOI USB3.0 and PCIE2 combo PHY
The USB3.0 Super-Speed / PCI Express Combo PHY is a programmable IP that is compatible with the PHY Interface for PCI Express and…
SAMSUNG 28nm FDSOI USB2.0 Dual Role PHY/OTG PHY
The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.
Samsung 28nm FDSOI MIPI DPHY V1.1
IP
Samsung 28nm FDSOI USB3.0 Type-C PHY
IP
Samsung 28nm FDSOI 1.8v/1.0v LVDS Transmitter
IP
Samsung 28nm FDSOI 1.8v/1.0v sub-LVDS Receiver
IP