Vendor: Cadence Design Systems, Inc. Category: Ethernet

1.6T Ultra Ethernet Controller

MAC/PCS/FEC Solutions up to 1.6T

Controller Ethernet 1.6T View all specifications

Overview

Cadence High-Speed Ethernet Controller IP family supports both single- and multi-channel Ethernet applications for high-performance computing (HPC), networking, artificial intelligence and machine learning (AI/ML), and 5G Wireless communications. It provides a complete Ethernet subsystem solution up to 1.6Tbps with Cadence Scale Up and Scale Out SerDes PHYs. The Ultra Ethernet controller supports key features for optimized AI applications, such as link layer retry (LLR) and credit-based flow control mechanisms (CBFC).

Key features

  • Compliant with IEEE 802.3, Ultra Ethernet Consotium, and Ethernet Technology Consortium specifications
  • Integrated FEC support including RS(528,514), RS(544,514), Firecode, Ethernet Technology Consortium Low Latency RS FEC
  • Supports 802.3 PAUSE and 802.1Qbb Priority Flow Control (PFC) frame-based flow control, 802.3br Interspersing Express Traffic (IET) and IEEE 802.1AS Precision Time Protocol (PTP)
  • APB interface for management and control
  • Loopback modes provided for fault diagnostics
  • Single channel and multi-channel (channelized) solutions available
  • Complete Ethernet subsystem solutions up to 1.6T along with Cadence Scale Up and Scale Out SerDes PHYs

Block Diagram

Click to open fullscreen

Benefits

  • High Performance: Design for high performance with optimized PPA
  • Standards Compliance: Compliant with IEEE 802.3, Ultra Ethernet Consortium, and Ethernet Technology Consortium specifications
  • Ease of Use: PHY + controller integrated subsystem delivery to ease SoC integration

Specifications

Identity

Part Number
1.6T Ultra Ethernet Controller
Vendor
Cadence Design Systems, Inc.
Type
Silicon IP
Controller / PHY
Controller

Standards & Interfaces

Ethernet Standard
Ethernet 1.6T

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Ethernet IP core

AI Semiconductor Design at 3nm and 2nm: Silicon-Proven IP

In this second blog of our ongoing series, we examine how Cadence, in close partnership with TSMC, helps teams accelerate AI silicon design at advanced process nodes. For customers, this translates into reduced design risk, faster convergence to tapeout‑quality results, and greater confidence at the leading edge of AI and HPC design.

UALink Under the Hood: Why Full-Stack Verification Wins

Verifying UALink means following a transaction the way the silicon does: down through four layers, out across one, two, or four SerDes lanes at the configured 100G or 200G serial rate, and back again, with its meaning and its bytes both intact. This blog takes that journey one layer at a time, and along the way examines a detail of the data link flit that is easy to overlook and important to get right.

Enhancing Ethernet Security with MACsec

Ethernet was originally designed for high-speed data transfer and interoperability between devices. However, traditional Ethernet does not provide built-in mechanisms for securing data traffic, such as encryption or authenticity protection. This is where MACsec comes into the picture.

Frequently asked questions about Ethernet IP cores

What is 1.6T Ultra Ethernet Controller?

1.6T Ultra Ethernet Controller is a Ethernet IP core from Cadence Design Systems, Inc. listed on Semi IP Hub.

How should engineers evaluate this Ethernet?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Ethernet IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP