Ensuring software quality & reliability with configuration & change management
By Kim H. Pries from Stoneridge and Jon M. Quigley from Volvo 3P electrical
Embedded.com (04/29/09, 01:29:00 AM EDT)Configuration management is a fundamental product development process. In fact, we would say "you don't know what you are doing if you don't know what you have;" that is, you don't have much of an organization if you don't know what your product is or the resources that are available.
We know from experience in various companies that an optimally running configuration management program will reduce erroneous fault reports and will also stream line test times. Manufacturing firms with good configuration management systems bring their part numbers and product releases under control.
In general, the enterprise is completely dependent on robust configuration management, whether the product is software, firmware, or hardware. Sending the customer the incorrect version of a product is a quick way to become a "de-sourced" supplier.
The Purpose of Configuration Management
Not only that, but we can have straightforward traceability of function and feature growth over specification revisions as well as over content--hardware and software--delivery. Throughout the process (Figure 1, below), we can always clearly identify changes, execute pre-release containment, and identify compatible components within a system.

Figure 1. Configuration Management Process
To read the full article, click here
Related Semiconductor IP
- Zigbee Transceiver PHY
- Data Flow Architecture IP
- AMBA SPI Controller MRAM Controller
- Ethernet MAC
- Protocol Bridges
Related Articles
- IP Configuration Management with Abstract Parameterizations
- High Quality IP creation through Efficient Packaging and Multiple Configuration Testing
- Comprehensive Change Management for SoC Design
- Hardware Configuration Management and why it's different than Software Configuration Management
Latest Articles
- A Low-Latency ASIC Architecture for Real-Time Line Segment Detection
- BitFair: A 12nm Bit-Serial CNN Accelerator with Learnable Early Termination and Adaptive Bit Ordering for Ultra-Low-Power XR Vision
- A Flexible Sparsity-Aware FPGA Accelerator with Column-Wise Compression for Efficient CNN Inference
- Reducing Instruction-Fetch Energy in RISC-V for Embedded AI Processing via Dynamic and Static Loop Caching
- SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow