A closer look at security verification for RISC-V processors
By Ashish Darbari, Axiomise
EDN (February 13, 2023)
Verifying the security of processors has become an essential step in the design of modern electronic systems. Users want to be sure that their consumer devices can’t be hacked, and that their personal and financial data is safe in the cloud. Effective security verification involves the processor hardware and the many layers of software running atop it.
This article discusses some of the challenges associated with hardware security verification and presents a formal-based methodology to provide a solution. Examples of designs implementing the popular RISC-V instruction set architecture (ISA) demonstrate the power of this approach.
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