Safety & security architecture for automotive ICs
Yash Saini & Arun Jain (Freescale Semiconductors)
EDN (September 25, 2013)
The automotive industry is changing rapidly to address the stringent requirements for safety and security of vehicular systems. Requirements are not only coming from customers, but regulatory authorities are also pressuring for greater safety and security in vehicles. The requirements include high bandwidth networks, improved data security, enhanced functional safety, and reduced energy consumption.
The ISO 26262 standard defines functional safety for automotive equipment applicable throughout the lifecycle of all automotive electronic and electrical safety-related systems. The standard is an adaptation of the Functional Safety standard IEC 61508 for Automotive Electric/Electronic Systems.
Automotive systems need to be protected against any real-time defects to make it safe for use. Real-time defects can include internal and external errors (e.g., the vehicular communication network).
Automotive data security ranges from vehicle theft protection to enabling secure communication with external devices such as smart phones, MP3 players, or navigation devices. Security also means protection against hackers. After gaining access, a hacker could control everything from the entertainment system to braking.
To read the full article, click here
Related Semiconductor IP
- AXI to UCIe FDI Interface IP
- 45SPCLO UCIe-Class 1-32Gbps Low Power Receiver IP (NRZ)
- 45SPCLO UCIe-Class 1-32Gbps Low Power Transmitter IP (NRZ)
- Peripheral Sensor Interface (PSI5) Host Controller
- Link Acceleration Unit
Related Articles
- RISC-V Functional Safety for Autonomous Automotive Systems: An Analytical Framework and Research Roadmap for ML-Assisted Certification
- How a Standardized Approach Can Accelerate Development of Safety and Security in Automotive Imaging Systems
- Security Enclave Architecture for Heterogeneous Security Primitives for Supply-Chain Attacks
- Crypto-RV: High-Efficiency FPGA-Based RISC-V Cryptographic Co-Processor for IoT Security
Latest Articles
- Croc: Training the Next Generation Chip Designers on Domain-Specific End-to-End Open Source Silicon
- Design and Development of a Neuromorphic Silicon Suite: PVT Sensing, Stochastic LIF Inference, On-Chip STDP Learning, and Crossbar Programming
- LLM4RTL: Tool-Assisted LLM for RTL Generation
- Towards Delta Aware Training: Efficient DNN Weight Storage for Resource-Constrained FPGAs
- CHERI-D: Secure and efficient inline object ID for CHERI temporal memory safety