How to speed FPGA debug with measurement cores and a mixed-signal oscilloscope

In which a packet communications system is analyzed, and glitches on an external serial channel are linked to a crashing state machine inside the FPGA.

By Brad Frieden, Agilent    
June 28, 2006 - pldesignline.com

Today's digital designs often find significant portions of their functionality implemented with FPGAs. When debugging such systems, one challenge can be gaining the necessary visibility to key signals inside the FPGAs, since there is usually a significant pressure to minimize the use of FPGA pins for debug, rather than for the design. Often in debug, there's also the need to view both internal FPGA functional signals, like state machines, while also carefully viewing timing and signal integrity characteristics of digital signals on the FPGA interface as it connects to the rest of the system. The latter is typically looked at with digitizing oscilloscopes. In this article, we will look at an approach that allows the combination of these measurements through the use of an Agilent mixed signal oscilloscope (MSO) in conjunction with an application add-in called the FPGA Dynamic Probe.

To read the full article, click here