DSP options to accelerate your DSP+FPGA design
Suhel Dhanani, Altera Corporation
EETimes (10/14/2010 2:56 PM EDT)
Although signal processing is usually associated with digital signal processors, it is becoming increasingly evident that FPGAs are taking over as the platform of choice in the implementation of high-performance, high-precision signal processing.
For many such applications, the choice generally boils down to using either a single FPGA, a FPGA with an associated DSP processor or a farm of DSP processors.
While it is generally understood that DSP processors can be programmed in C – leading to a much simpler development flow – this advantage is quickly dissipated when the design has to be partitioned across either multiple DSP processors or between a DSP processor and a FPGA. The truth is that a single DSP processor lacks the performance to do the signal processing required by most infrastructure systems.
This then requires system designers to make a choice between using multiple DSP processors or a FPGA. The latter choice almost always results in the lowest system cost/power implementation.
To read the full article, click here
Related Semiconductor IP
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
Related Articles
- Open-Source Design of Heterogeneous SoCs for AI Acceleration: the PULP Platform Experience
- Introduction to the Philips’ LPC 2100 ARM 7-based microcontroller – the first standard microcontroller to integrate ARM-7 – and the first to use Philips’ new Memory Acceleration Module
- Using PLDs for Algorithm Acceleration - Faster, Better, Cheaper
- C-Language techniques for FPGA acceleration of embedded software
Latest Articles
- SCENIC: Stream Computation-Enhanced SmartNIC
- Agentic AI-based Coverage Closure for Formal Verification
- Microarchitectural Co-Optimization for Sustained Throughput of RISC-V Multi-Lane Chaining Vector Processors
- RISC-V Functional Safety for Autonomous Automotive Systems: An Analytical Framework and Research Roadmap for ML-Assisted Certification
- Emulation-based System-on-Chip Security Verification: Challenges and Opportunities