Scaling Down Semi Process Nodes for IoT Apps
Bernard Cole, EETimes
11/9/2015 10:00 AM EST
Not so fast, said Tom Starnes, semiconductor industry analyst at Objective Analysis. He points out that most of these announcements have more to do with standard microprocessor architectures and are unrelated to the requirements of Internet of Things (IoT} devices.
To read the full article, click here
Related Semiconductor IP
- Verification IP for C-PHY
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
Related News
- Thalia Design Automation announces AMALIA Platform release 25.3 qualified for advanced process nodes down to 4nm
- Chipidea unveils a comprehensive, multi standard WLAN/WiMAX AFE portfolio in tech nodes down to 90nm
- Cadence Enhances Unified Custom/Analog Flow to Boost Productivity at Nodes Down to 20nm
- Synopsys and Samsung Foundry Collaborate to Deliver Fastest Design Closure and Signoff for Process Nodes Down to 3nm
Latest News
- Tord Larsson-Steen appointed new CEO of Shortlink
- GUC Collaborate with Wiwynn to Advance Silicon-to-System Infrastructure for Next-Generation Hyperscale AI
- Two Weebit Nano product customers tape-out; one already demonstrating a functional prototype
- JEDEC Advances DDR5 MRDIMM Ecosystem with New Memory Interface Logic and Expanded MRDIMM Roadmap
- Altera Brings Determinism to Physical AI Systems with Latest Release of FPGA AI Suite