What’s the cost for 3-D chips?
Mark LaPedus, EETimes
12/9/2010 6:46 PM EST
BURLINGAME, Calif. – What’s the biggest hurdle to bring 3-D chips based on through-silicon via (TSV) technology into mass production?
There are many, but cost is perhaps the big issue.
Antun Domic, senior vice president and general manager of the Implementation Group for Synopsys Inc., said the cost overhead for a TSV-based 3-D device is $150 per wafer. That is 5 percent of the total cost of a 300-mm wafer.
To read the full article, click here
Related Semiconductor IP
- Verification IP for C-PHY
- Band-Gap Voltage Reference with dual 2µA Current Source - X-FAB XT018
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
Related News
- NEO Semiconductor Announces the Development of its 3D X-AI Chip; Targeted to Replace Existing HBM Chips and Solve Data Bus Bottlenecks
- Allen Wu on Disrupting $100M Cost of Building Custom AI Chips
- MagnaChip to Offer Cost Competitive 0.18um Embedded EEPROM Technology
- XYALIS Brings Cost Reduction To Mask Design
Latest News
- UMC Reports First Quarter 2026 Results
- Rambus Appoints Sumeet Gagneja as Chief Financial Officer
- SEMI Reports Worldwide Silicon Wafer Shipments Increase 13% Year-on-Year in Q1 2026
- POLYN Technology Announces Tapeout of Automotive Chip
- QuickLogic Establishes New Banking Relationship and Secures $10 Million Revolving Credit Facility