VIP Architecture: Why Native SystemVerilog and UVM?
January 14, 2015
Four years ago, we talked to several key customers, and decisively moved all our VIP development to an architecture based on SystemVerilog and UVM. In this short video, you can learn about the benefits of using such VIP for verifying your SoCs: ease-of-use, productivity and accelerated coverage closure.
Related Semiconductor IP
- Root-of-Trust IP - High-Assurance Security for Advanced and Regulated Applications
- Root-of-Trust IP - Enhanced-Assurance, Configurable Security for Scalable Semiconductor Designs
- Root-of-Trust IP - Compact, Configurable Security for Flexible Semiconductor Designs
- 100-10Gbps Ethernet MAC Controller
- SD Card Controller
Related Blogs
- Avoiding Redundant Simulation Cycles for your UVM VIP with a Simple Save-Restore Strategy
- Key Advantages of Synopsys Memory VIP Architecture
- How to Integrate AXI VIP into a UVM Testbench
- Start using AXI VIP with some basic understanding of UVM