Are we on the verge of a new ASIC era? DARPA’s Nanowriter and practical e-beam lithography
January 26, 2011
The advent of gate arrays opened the gates of custom silicon for everycompany. Before that, only the really heavyweight players could afford the tools and training to create tailored ICs for their end products. The early gate arrays changed that situation by lowering costs to the point where custom silicon made sense in far more system designs. In a sense, we’re facing the same situation today. The cost of creating an SoC or ASIC in 65nm, 40nm, and now 32nm process technology has climbed to the tens of millions of dollars. It’s a game not everyone can play for a variety of reasons.
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