DARPA Calls For 50X Improvement in SoC
October 13, 2017
As recently reported, in an effort to initiate resurgence of the U.S. electronics industry, some $500-$800 million will be invested in post-Moore's Law technologies.
Quoting from the BAA: “As noted above, the 3DSoC technology demonstrated at the end of the program (3.5 Years) should also have the following characteristics:
- Capability of > 50X the performance at power when compared with 7nm 2D CMOS technology.
- …” This is a paradigm shift for the computer industry and to high-tech world as normal scaling would provide as 3x at best, as indicated by the following well known chart:
To read the full article, click here
Related Semiconductor IP
- I3C Full Controller / Target
- I3C HCI Host Controller
- USB-C Power Delivery IP Core
- Configurable Multi-Channel DMA Controller
- Samsung Foundry 4nm 1V8 GPIO I3C
Related Blogs
- 2024 Set The Stage For NoC Interconnect Innovations In SoC Design
- Portable Stimulus: The Next Big Leap In SoC Verification
- Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
- The 5 Biggest Challenges in Modern SoC Design (And How to Solve Them)
Latest Blogs
- TDISP and Confidential Computing: Extending the PCIe Chain of Trust
- AI-Generated UVM Testbenches from SoC Specifications
- Generating Chip Subsystems Automatically: A New Answer to Manage Chip Design Complexity
- Agentic AI Should Fit the Way You Engineer
- Listening at the Speed of Memory: Live Speech Recognition on Chimera