Custom processor design just became easier
June 29, 2023
One-stop-shopping for cores and peripherals
Codasip and SmartDV recently announced joining forces to simplify and accelerate custom processor design by offering our customers the possibility to license Codasip RISC-V IP and the necessary peripheral IP from SmartDV under a single contract. To better understand this promising collaboration, we asked Erik Panu, SmartDV, and Mike Eftimakis, Codasip, to tell us more about it.
To read the full article, click here
Related Semiconductor IP
- RISC-V Debug & Trace IP
- RISC-V IOPMP IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- 64-bit RISC-V core with in-order single issue pipeline. Tiny Linux-capable processor for IoT applications.
- Multi-core capable RISC-V processor with vector extensions
Related Blogs
- Increasing design skills for custom compute
- RISC-V Processor Design - Free YouTube Course by Maven Silicon
- Beyond design automation: How we manage processor IP variants with Codasip Studio
- Design Migration isn’t just a sprint – It’s a heptathlon
Latest Blogs
- Tape-Out Readiness Checklist: Engineering Decisions That Prevent Costly Respins
- How Cadence DSPs Put In-Cabin AI Audio On-Chip in SemiDrive's X10
- The Fastest Path to Scalable Photonic Systems: Using Proven IP for both PIC and EIC designs
- Building Trusted AI Agents from the Silicon Root of Trust
- Heterogeneous Computing in Space