NAND flash memory IP Listing

SPI Nand Flash Memory Model provides an smart way to verify the SPI Nand Flash protocols.It can work with Verilog HDL environment…

• SPI / QSPI XSPI

NAND Flash Memory Model provides an smart way to verify the NAND Flash component of a SOC or a ASIC.

• Test / Debug

Nand Flash Controller with AHB Interface over 74-Bit ECC correction capacity.

• DDR

NAND flash host controller with AHB interface, it supports SLC and MLC NAND flash.

• DDR

High-Performance SPI Master/Slave with HyperBus™ & xSPI Support The HyperBus™ Memory Controller IP Core is a high-speed, fully co…

• DDR

NAND Host Controller provides an easy interface to access NAND Flash Memory devices.

• NAND Flash
• Not Applicable
• Available
• FPGA IP Core

DFSPI – SPI FLASH Controller with Execute in place – XIP (SINGLE, DUAL and QUAD SPI Bus Controller with DDR / DTR support and opt…

• DDR

The ONFI 2.3 NAND Flash Controller IP Core is a full-featured, easy to use, synthesizable core, easily integrated into any SoC or…

• NAND Flash

The NAND Flash landscape is changing and the Arasan NAND Flash Controller IP Core is changing in accordance with it.

• NAND Flash

The NAND Flash landscape is changing and the NAND Flash Controller IP Core is changing in accordance with it.

• NAND Flash

The NAND Flash Controller Verification IP (VIP) is a specialized tool for validating and simulating NAND Flash memory interfaces …

• NAND Flash

The Open NAND Flash Interface (ONFI) is an Open standard for NAND Flash Memory chips.

• Single-Protocol PHY

Open NAND Flash Interface (ONFI) for NAND Flash Memory chips is an open standard.

• Single-Protocol PHY

The SPI-MEM-CTRL core is an SPI serial NOR and serial NAND flash memory controller, supporting Single, Dual and Quad I/O SPI acce…

• SPI / QSPI XSPI

NAND Flash Controller has a built-in AHB Slave Interface, handles all sorts of Nand Flash commands, address & data sequences.

• NAND Flash
• Soft Core
• Now
• AMBA AHB Ver 2.0

The EP501 NAND Flash controller provides an easy interface for user to access single-level and multi-level cell (SLC and MLC) NAN…

• NAND Flash
• now

SD / SDIO Card Combo Device IP core is SD memory controller and a SDIO controller with an AHB interface.

• SD / eMMC Controller

eMMC 4.51 is the latest specification released by JEDEC and is designed to meet the requirements for secure yet flexible program …

• SD / eMMC Controller

Gold standard for JEDEC® ONFI memory device for your IP, SoC, and system-level design verification.

• Verification IP

Zhuhai Chuangfeixin’s Floating-gate eNOR Flash memory macro are silicon characterized and qualified on Huali Microelectronics Cor…

• Flash
• MP - Mass Production