DDR2 IP Listing

DDR2 Monitor provides an smart way to verify the DDR2 component of a SOC or a ASIC.

• DDR

DDR2 DFI Verification IP provides an smart way to verify the DDR2 DFI component of a SOC or a ASIC.

• DDR

DDR2 Memory Model provides an smart way to verify the DDR2 component of a SOC or a ASIC.

• DDR

DDR2 Synthesizable Transactor provides a smart way to verify the DDR2 component of a SOC or a ASIC in Emulator or FPGA platform.

• DDR

DDR2 interface provides full support for the DDR2 interface, compatible with JESD79-2F specification and DFI-version 2.0 or highe…

• DDR

DDR2 interface provides full support for the DDR2 interface, compatible with JESD79-2F specification and DFI-version 2.0 or highe…

• DDR
• In Production
• Immediately

The DDR3/2 PHY is compatible with JEDEC DDR3 and JEDEC DDR2 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to1866Mbps …

• UMC
• 40nm
• LP
• In Production

The DDR and DDR2 SDRAM controllers handle the complex aspects of using DDR and DDR2 SDRAM—initializing the memory devices, managi…

• DDR

DDR2 DFI Assertion IP provides an efficient and smart way to verify the DDR2 DFI designs quickly without a testbench.

• DDR

DDR2 Assertion IP provides an efficient and smart way to verify the DDR2 designs quickly without a testbench.

• DDR

The Avalon Multi-port DDR2 Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II processor in…

• DDR
• Available for immediate sale

The DDR and DDR2 SDRAM Controller with ALTMEMPHY Intel FPGA Intellectual Property (IP) provides simplified interfaces to industry…

• DDR

The Enhanced Universal DDR Controllers consist of two high-performance products: the Enhanced Universal DDR Memory Controller (uM…

• DDR

The Enhanced Universal DDR Controllers consist of two high-performance products: the Enhanced Universal DDR Memory Controller (uM…

• DDR

The Enhanced Universal DDR Controllers consist of two high-performance products: the Enhanced Universal DDR Memory Controller (uM…

• DDR

The DDR2 / DDR3 library includes the combo driver / receiver cells and a full complement of power and support cells for both sing…

• TSMC
• 40nm
• G
• Silicon Proven

Increasing SoC/ASIC devices' complexity also demands increase in memory bandwidth.

• DDR
• In volume production silicon
• Now
• DDR1, DDR2, DDR

The Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller tha…

• DDR

This memory controller supports DDR2/3 SDRAM.

• DDR
• In Production
• Immediate

DDR2 PHY Data Block ;UMC 0.13um Logic HS/FSG Process

• UMC
• 130nm
• HS
• In Production