The MIPI SLIMbus Host v2.0 typically resides in a mobile platform’s application processor and provides two-wire, multipurpose con…
- Slimbus
The MIPI SLIMbus Host v2.0 typically resides in a mobile platform’s application processor and provides two-wire, multipurpose con…
Mobile radio communication systems are complex multi-radio systems comprising several transceivers.
The DSI Tx Controller IP is designed to provide MIPI DSI 1.3 – compliant high-speed serial connectivity for the host (mobile appl…
MIPI DSI-2 Transmitter Controller IP Core
The MIPI Display Serial Interface (DSI-2) Transmitter (host processor interface) Controller IP provides a high-speed serial inter…
eMMC 5.1 is the latest specification defined by JEDEC and is designed to meet the requirements for the next level of high-perform…
Deep capture / high visibility Debug IP for Intel FPGA
The customizable EXOSTIV IP core is a logic analyzer core that can be used to monitor the internal signals of an FPGA design with…
Deep capture / high visibility Debug IP for Xilinx FPGA
The customizable EXOSTIV IP core is a logic analyzer core that can be used to monitor the internal signals of an FPGA design with…
eFPGA IP — Flexible Reconfigurable Logic Acceleration Core
RapidFlex eFPGA IP provides a reconfigurable, upgradeable, and iterative logic computing layer for SoCs, MCUs, AI accelerators, i…
Ultra Ethernet Verification IP
The Ultra Ethernet (UE) Verification IP provides an effective & efficient way to verify the components interfacing with Ethernet …
The HBM4 Verification IP provides an effective & efficient way to verify the components interfacing with HBM interface of an ASIC…
The DDR6 Verification IP provides an effective & efficient way to verify the components interfacing with DDR6 interface of an ASI…
USB 3.0 Device Upgrade IP Core
The USB 3.0 Device Upgrade IP enables designers in the PC, mobile, consumer and communication markets to bring significant power …
The USB 2.0 Host IP is a USB 2.0 specification compliant host IP core with an optional AHB, PCI, or custom host interface.
The SDIO Card Device IP core is used to implement SDIO cards that are connected to a Host processor over a standard SD bus.
SD 4.1 / SDIO 4.1 / eMMC 4.51 Host Controller IP
The SD 4.1/SDIO 4.1 IP from Arasan Chip Systems is a integrated host controller IP solution that supports three key memory card I…
The SLIMbus v2.0 Device Controller IP is designed to provide MIPI SLIMbus compliant connectivity for a peripheral device, like an…
The High Speed Synchronous Serial Interface (HSI) Controller is used to provide high bandwidth, point-to-point, serial communicat…
MIPI DSI-2 Receiver IP Controller Core
The MIPI Display Serial Interface (DSI-2) Receiver (display panel interface) Controller IP provides a high-speed serial interface…
Arasan Chip Systems is a SOC IP provider of a suite of MIPI compliant IP solutions, which consist of IP cores, verification IP, s…
SD 4.1 eMMC 5.1 Dual Host Controller IP
The SD 4.1/SDIO 4.0/eMMC 5.0 Host IP from Arasan Chip Systems is a integrated host controller IP solution that supports three key…