Foundry sponsored - Single Port Register File compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power -…
- Register File
- Pre-silicon
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Foundry sponsored - Single Port Register File compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power -…
Single Port SRAM compiler - TSMC 90 nm LPeF - Memory optimized for high density and Low power - Dual voltage - compiler range up …
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm HV - Memory optimized fore high density and high speed - compile…
Foundry sponsored - Single Port SRAM compiler - TSMC 55 nm HV - Memory optimized for high density and Low power - compiler range …
Foundry sponsored - Single Port SRAM compiler - TSMC 55 nm HV - Memory optimized for high density and Low power - compiler range …
7 track Extra Low Consumption standard cell library with Dual voltage capability
TSMC 152 G, SESAME eLC DV is specifically designed to enable robust dual voltage operation, with characterizations taking into ac…
IEEE 802.1ae MACSEC IP Core for 10 Gbit Ethernet
Ethernet is a ubiquitous, efficient and cost-effective transport mechanism for unified communication of voice, data and video ove…
Multiple SecY IEEE 802.1ae MACSEC IP Core for 40Gbit Ethernet
Ethernet is a ubiquitous, efficient and cost-effective transport mechanism for unified communication of voice, data and video ove…
AES-GCM IP Core for 40Gbit/sec packet data
This state of the art implementation of AES-GCM achieves 40Gbit/sec performance on Virtex 5 FPGAs.
Duplex AES-GCM at 10Gbit/sec for OTN
This state of the art implementation of the AES-GCM algorithm provides privacy and authentication and achieves 10Gbit/sec perform…
This core extends the Algotronix G3 Encryption Standard (AES) core by providing a secure, standardized method for loading cryptog…
Xilinx 40G/100G Ethernet LogiCORE based on Sarance Technologies Best-In-Class Intellectual Property Xilinx High-Speed Ethernet Lo…
TSMC 130 G, SESAME BIV, a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery co…
TSMC 55 LPeF, SESAME BIV, a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery …
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm HV - Memory optimized fore high density and high speed - compile…
High Speed Low Power JPEG Codec
IP
sROMet compiler - Memory optimized for high density and high speed - compiler range up to 2M
Foundry sponsored - sROMet compiler - TSMC 55 nm HV - Non volatile memory optimized for high density and high speed - compiler ra…
Foundry Sponsored - Single Port SRAM compiler - TSMC 130 nm BCD - Memory optimized for ultra high density and high speed - compil…
Foundry sponsored - Dual Port SRAM compiler - TSMC 90 nm LPeF - Memory otimized for high density and low power - compiler range u…
Foundry sponsored - Dual Port SRAM compiler - TSMC 90 nm LPeF - Memory optimized for high density and low power - compiler range …