Best-in-class UART Verification IP for your IP, SoC and system-level design testing.
- Verification IP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Best-in-class UART Verification IP for your IP, SoC and system-level design testing.
Simulation VIP for Toggle NAND
In production since 2011 for many production designs.
This Cadence® Verification IP (VIP) provides support for the TileLink specification.
In production since 2016 for many production designs.
This Cadence® Verification IP (VIP) provides support for the SPI protocol.
Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for the SPDIF protocol pro…
Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for SMBus provides a bus functional model (BFM), in…
Simulation VIP for SD CARD and SDIO
In production since 2012 for many production designs.SD CARD Cadence Verification IP (VIP) upgrades the SD CARD and SDIO verifica…
The Cadence® Verification IP (VIP) for SAS is part of Cadence’s broad storage interface verification IP (VIP) portfolio.
In production since 2018 for many production designs.The Cadence® Verification IP (VIP) for Quad SPI provides verification of Q-S…
Incorporating the latest protocol updates, the Cadence® Verification IP (VIP) for PMBus provides a bus functional model (BFM), in…
In production since 2011.
The Cadence® PIPE PHY Verification IP (VIP) provides a mature, capable verification solution for the PHY layer of complex protoco…
Used by all PCIe, IP, and SoC design verification teams for all generations.The Cadence® Verification IP (VIP) for PCI Express® (…
In production since 2012 for dozens of designs.The Cadence® Memory Model Verification IP (VIP) for Flash Octal SPI (OSPI) Flash p…
Gold standard for JEDEC® ONFI memory device for your IP, SoC, and system-level design verification.
In production since 2018 for many production designs.The Cadence® Memory Model Verification IP (VIP) for OctaRam provides verific…
In production since 2011 for dozens of designs.
The Cadence® Verification IP (VIP) for NVMe is part of Cadence's storage interface VIP portfolio.
Simulation VIP for MIPI UniPro
Best-in-class MIPI® UniPro Verification IP for your IP, SoC, and System-Level Design Testing In production since 2011 on dozens o…