Easy to change SRAM testing algorithms after CP phases EZ-TEC can coexist with the existing memory testing circuits of chip desig…
- Monitoring
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Easy to change SRAM testing algorithms after CP phases EZ-TEC can coexist with the existing memory testing circuits of chip desig…
Easy to finish SRAM repair and data backup EZ-Safety is a dedicated IP designed for automotive electronic chips.
Easy to monitor lifecycle of SoC EZ-Monitor ensures the memory lifecycle within the chip, and effectively monitor the lifecycle o…
Implement all recommendation test items for hight test coverage The BIST can realize all eFlash testing items, covering UMC’s 40n…
Compliant with USB2.0 and USB1.1 specification
Full compatible with PIPE4.2 interface specification
ION 64b66b IP (64b/66b High-speed Serial Interface)
High-speed serial interface achieved using a lightweight protocol ION 64b66b is an IP for high-speed serial interface targeting a…
ION 8b10b IP (8b/10b High-speed Serial Interface)
High-speed serial interface achieved using a lightweight protocol ION 8b10b is a high-speed serial interface targeting applicatio…
DFSPI – SPI FLASH Controller with Execute in place – XIP (SINGLE, DUAL and QUAD SPI Bus Controller with DDR / DTR support and opt…
Avery SATA VIP support verification of host and device and expansion targets.
Avery SAS VIPs support verification of host and device and expansion targets.
Verification IP for DisplayPort/eDP/DSC/DPI
A comprehensive VIP solution for DisplayPort (DP) and eDP source and sink designs.
A comprehensive VIP solution for HDMI 2.0 source and sink designs.
A comprehensive VIP solution for multiple versions of the FlexRay standard used by SoC and IP designers to ensure comprehensive v…
LIN-Xactor is a comprehensive VIP solution for the LIN standard used by SoC and IP designers to ensure comprehensive verification…
Verification IP for CSI/DSI/C-PHY/D-PHY
A comprehensive VIP solution for CSI-2, DSI-2, D-PHY and C-PHY transmitter and receiver designs.
A comprehensive VIP solution portfolio for Soundwire 1.0 used by SoC and IP designers to ensure comprehensive verification and pr…
In the DVB-T2 transmission, the Physical Layer Pipes (PLPs) carries the MPEG-2 Transport Streams (TSs).
ISDB-S3-LDPC-BCH Decoder
The designed Single Carrier is working at adjustable sampling rate as low as 83.457 KHz, as high as 56 MHz It supports adjustable…