Low-leakage LDO in TSMC 22ULL to supply logic and analog domains (up to 3.63V input supply)
Low-leakage LDO in TSMC 22ULL to supply logic and analog domains (3.3V input supply)
- TSMC
- 22nm
- ULL
- Pre-Silicon
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
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Low-leakage LDO in TSMC 22ULL to supply logic and analog domains (up to 3.63V input supply)
Low-leakage LDO in TSMC 22ULL to supply logic and analog domains (3.3V input supply)
Capless low input voltage LDO in GF 22FDX
Capacitor-less low input voltage LDO regulator in GlobalFoundries 22FDX
Always-on Voice Activity Detection interfacing with analog microphones.
The WT-a-HD.03 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low…
24-bit Cap-less ADC 101 dB SNR low power and low latency 3 channels
The sADC101-SW3-LR.01 is a mixed (analog and digital) Virtual Component containing two mono ADCs, and additional functions offeri…
24-bit Cap-less ADC 106 dB SNR with ASRC and phase alignement 6 channels
The hexADC-uLP-SW1.01 is a mixed (analog and digital) Virtual Component containing six mono ADCs, and additional functions offeri…
GNSS (GPS, Galileo, GLONASS, Beidou3, QZSS, SBAS) Ultra-low power RF Receiver IP
This GNSS RF Receiver IP is silicon-proven in TSMC40nm ULP process node, offers comprehensive support for all current satellite-b…
8-stage, dual-issue, highly efficient in-order pipeline compatible with the RISC-V RV64GCV ISA
The SiFive Performance P270 is an 8-stage, dual-issue, efficient in-order pipeline compatible with the RISC-V RV64GCV ISA.
The second generation SiFive® Intelligence™ X390 is an 8-stage dual issue, in-order, superscalar processor with dual vector proce…
DVB-S2X NarrowBand Demodulator & Decoder IP (Silicon Proven)
This is NarrowBand demodulator IP is silicon proven and extratced from production chipsets, it performs demodulation according to…
Silicon agnostic implementation of the Physical Coding Sublayer (PCS) compliant with Ethernet standard IEEE 802.3-2018 supporting…
HDR ISP framework for multi-camera applications
Xylon offers a logicBRICKS IP suite for implementing High-Dynamic Range (HDR) Image Signal Processing (ISP) pipelines in embedded…
64-bit Multiprocessor with Level-2 Cache-Coherence
AndesCore™ AX45MP 64-bit multicore CPU IP is an 8-stage superscalar processor based on AndeStar™ V5 architecture.
16Gbps multi-protocol programmable SerDes PHY in UMC 28HPC+
Faraday 16Gbps multi-protocol programmable SerDes PHY IP in UMC 28HPC+ process is designed with a system-level approach to provid…
DVB-S2/DVB-S2X Demapper/LDPC/BCH Decoder
The LCD01D is a high speed decoder for the DVB-S2/DVB-S2X low density parity check (LDPC) and Bose, Chaudhuri and Hocquenghem (BC…
Over-voltage Protection Module to handle direct connection of voltage regulators to a 5V battery using standard 1.8V IO devices
Nano power DC-DC converter in GF 22FDX with ultra-low quiescent current and high efficiency at light load
The RAR-eSR-qLR Retention Alternating Regulator combines two regulation sub-components: a high-efficiency switching regulator (eS…
Combined Power On Reset and Brown Out Reset
Combined Power On Reset and Brown Out Reset
Linear regulator with ultra low quiescent current for retention applications
Linear regulator with ultra low quiescent current for retention applications
Dolphin Design provides a Power Management IPs platform, toward three objectives: To standardize and ease Power Regulation Networ…