Mobile Industry Processor Interface (MIPI) D-PHY is supported on Agilex™ 5 and Agilex™ 3 FPGAs allowing transmission and receptio…
- MIPI D-PHY
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Mobile Industry Processor Interface (MIPI) D-PHY is supported on Agilex™ 5 and Agilex™ 3 FPGAs allowing transmission and receptio…
LVDS Tunneling Protocol and Interface (LTPI) IP
LVDS Tunneling Protocol and Interface (LTPI) is a soft IP introduced in the DC-SCM 2.0 Specification to facilitate the tunneling …
GTS is a general purpose transceiver in Agilex™ 5 and Agilex™ 3 FPGAs.
The 10GBASE-R PHY Intel® FPGA Intellectual Property (IP) core allows connectivity directly with any XFP or SFP+ optical module or…
As a part of the Video and Vision Processing (VVP) Suite Intel® FPGA IP, the 3D look-up table (LUT) Intel® FPGA IP provides an ef…
On-Die PDN Analyzer for Transistor-Level Visibility and Telemetry
The Aeonic Insight™ PDN IQ is an in-situ, on-die PDN (Power Delivery Network) analyzer providing transistorlevel PDN telemetry at…
Dilithium IP Core is a post-quantum digital signature algorithm (DSA).
TRNG IP Cores perform true random number generation in compliance with the standards and guidelines defined in 'NIST SP 800-90B'.
SHA3 IP Cores perform cryptographic hashing in compliance with the SHA-3 (Secure Hash Algorithm 3) specifications defined in 'FIP…
RSA Keygen IP Cores perform key generation in compliance with the RSA Key Pair Generation specifications defined in 'FIPS 186'.
RSA IP Cores perform digital signature generation and verification in compliance with the RSA (Rivest-Shamir-Adleman) Digital Sig…
ECDSA IP Cores perform digital signature generation and verification in compliance with the Elliptic Curve Digital Signature Algo…
DRBG IP Cores perform deterministic random bit generation in compliance with the standards and guidelines defined in 'NIST SP 800…
True Random Number Generator (TRNG) IP
High-Quality Entropy for Secure Key Generation and Cryptographic Operations The TRNG IP delivers NIST- and BSI-compliant entropy …
Lightweight and Configurable Root-of-Trust Soft IP
QRoot Lite™ is a silicon IP solution designed specifically for resource-constrained MCUs and IoT devices.
Adaptive Interactive detection- Per-Survivor Processing
1: CPM Modulator/ Demodulator Data Rate 200kbps to 10 Mbps in steps of 100Kbps Modulation Index Programmable up to 0.5 Baseband F…
Technical specifications Modulation QPSK, 8PSK, 16APSK Roll-off Factor 0.2, 0.25, 0.35 Symbol Rate 1 to 300 Msym/sec (QPSK and 8P…
100 G Ethernet MAC & PCS IP Core
The 100 Gbps Ethernet IP solution offers a fully integrated IEEE802.3ba compliant package for NIC (Network Interface Card) and Et…
MIPI DSI2
MIPI CSI-2