The proliferation of sensors in mobile wireless and mobile-influenced products has created significant design challenges.
- Verification IP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The proliferation of sensors in mobile wireless and mobile-influenced products has created significant design challenges.
Avery SATA VIP support verification of host and device and expansion targets.
Avery SAS VIPs support verification of host and device and expansion targets.
Verification IP for DisplayPort/eDP/DSC/DPI
A comprehensive VIP solution for DisplayPort (DP) and eDP source and sink designs.
A comprehensive VIP solution for HDMI 2.0 source and sink designs.
A comprehensive VIP solution for multiple versions of the FlexRay standard used by SoC and IP designers to ensure comprehensive v…
LIN-Xactor is a comprehensive VIP solution for the LIN standard used by SoC and IP designers to ensure comprehensive verification…
Accelerated confidence in simulation-based verification of RTL designs with USB interfaces: UCM2, USB3.1, USB3.2, USB-C, Other US…
Verification IP for CSI/DSI/C-PHY/D-PHY
A comprehensive VIP solution for CSI-2, DSI-2, D-PHY and C-PHY transmitter and receiver designs.
A comprehensive VIP solution portfolio for Soundwire 1.0 used by SoC and IP designers to ensure comprehensive verification and pr…
Accelerated confidence in simulation-based verification of RTL designs with embedded storage interfaces such as UFS, UniPro, M-PH…
AMBA® ACE and CHI coherent interconnect technologies enable an entirely new class of high-performance datacenter applications in …
Accelerated confidence in simulation-based verification of RTL designs with Compute Express Link (CXL) interfaces: CXL1, CXL2, CX…
The AXI Bridge for PCIe IP core is the IP solution with a mix of multiple industry standard memory mapped AXI Interfaces.The AXI …
AXI Bridge with DMA for PCIe IP Core
The AXI Bridge with DMA IP core is the ultimate PCIe DMA IP solution with a mix of multiple industry standard AXI Interfaces.
In Digital video broadcasting for digital transmission for satellite applications, a FEC (Forward Error Correction) sub-system is…
In the DVB-T2 transmission, the Physical Layer Pipes (PLPs) carries the MPEG-2 Transport Streams (TSs).
The K-best decoder is part of the MIMO decoder.
ISDB-S3-LDPC-BCH Decoder
The designed Single Carrier is working at adjustable sampling rate as low as 83.457 KHz, as high as 56 MHz It supports adjustable…