Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
Display port 1.4 Rx IP supports Channel bandwidth Up to 5.4bps per channel (HBR2), Programmable analog characteristics like CDR B…
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 55SP
The DisplayPort transmitter PHY version 1.4 can transmit data at rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2).
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
Data rates for the DisplayPort transmitter PHY version 1.4 range from 1.62Gbps (RBR) to 5.4Gbps (HBR2).
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP
Version 1.4 of the DisplayPort transmitter PHY is capable of transmitting data at rates of 1.62Gbps (RBR) to 5.4Gbps (HBR2).
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2).
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2).
MIPI C/D Combo TX PHY and DSI controller
The MIPI C and D Combo Transmitter PHY and DSI Controller are tailored for high-performance display applications.
MIPI D-PHY TX PHY and DSI controller
The MIPI D-PHY Transmitter PHY and DSI Controller are tailored for high-performance display applications.
DSI transmitter controller for application
ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications
The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where…
ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where…
The MIPI I3CⓇ Total IP solution is a seamless integration of MIPI I3CⓇ controller, MIPI I3CⓇ PHY I/O, and MIPI I3CⓇ software stac…
The DSI v1.3 Receiver Controller IP is designed to provide MIPI DSI 1.3 compliant high-speed serial connectivity for device (mobi…
VBO TX and RX PHY & Controller
The VBO IP is designed for transmitting or receiving video signals between a video source device and display device, which is ful…
The DP/eDP IP is designed for transmitting or receiving video and audio signals between the video source devices and display devi…
MIPI DSI-2 Transmitter Controller IP Core
The MIPI Display Serial Interface (DSI-2) Transmitter (host processor interface) Controller IP provides a high-speed serial inter…
MIPI D-PHY1.2 CSI/DSI TX and RX
The MIPI D-PHY + DSI/CSI Controller IP is a versatile solution designed for high-speed data transmission in mobile and multimedia…
MIPI C/D-PHY CSI/DSI TX and RX
The MIPI C/D-PHY + DSI/CSI Controller IP is a versatile solution designed for high-speed data transmission in mobile and multimed…
The C/D-PHY Combo IP delivers top-tier PPA characteristics and is mass production-proven across multiple customer SoCs.
Video and Image Processing Pack
Important Notice: The VIPP package and its cores are in maintenance mode and not recommended for new designs.